Abstract: A process control system which includes at least one manipulated variable and at least one controlled variable, provides a method for robust control of a process. Predetermined constraints of the manipulated variables and the controlled variables, and the present values of the manipulated variables are obtained. The controller is loaded with parameters which define an optimal controller, the parameters being calculated off-line. To determine the parameters a single min-max statement is defined for a worst case model of the process which operates in conjunction with a best case controller. The single min-max statement is converted to a corresponding canonical expression in the form of a minimization problem, the resultant solution of the minimization problem being the parameter.

Abstract: A process control system having a feedback controller, at least one manipulated variable and one controlled variable with a feedforward loop is provided. Independent feedforward control is incorporated into the feedback controller by defining a feedforward control funnel and a feedback control funnel for each controlled variable, specifying a time T.sub.FF in which the disturbance is to be eliminated and a time T.sub.FB in which the controlled variable is to reach a steady state value, respectively. The shorter of the feedforward control funnel and the feedback control funnel is selected. If T.sub.FF is less than T.sub.FB, the feedback control speed is compensated such that the feedback controller speed is not increased. If T.sub.FF is greater then or equal to T.sub.FB, no compensation is performed, thereby effectively providing independent tuning parameters for the feedforward control solution and the feedback control solution.

Abstract: An interface provides a path to transfer data from a proprietary network to an open system. The proprietary network includes at least one module central processing unit (CPU) and a module memory associated therewith operatively connected to the proprietary network. A shared memory and shared memory logic are interposed between the proprietary network and the open system, thereby forming the data path. The method comprises the steps of accepting requests for data from the open system by a parasitic task function within the module CPU. The data requested of the proprietary network is obtained and placed in a predetermined location of the module memory in a form understandable to the open systems. A pointer value is placed in the shared memory, the pointer value containing the value of the predetermined location of the module memory, the shared memory being mapped in the addressable memory space of the shared memory logic using virtual memory techniques.

Abstract: A process plant has a process control system and a plurality of production lines, each production line having a predetermined equipment configuration. The process control system further includes a controller for interfacing to each production line. The process control system has information pertaining to the equipment configuration of each production line stored in an equipment data base, the operations performed by each production line stored in an operations data base, and raw materials information of the process plant stored in a raw materials data base. A method for controlling the production of a product by a production line comprises the steps of building a formula based on the product to be produced. The formula data provides information relating to relative quantities of raw materials included in the product and the manner of combining the raw materials.

Abstract: The hold down apparatus securely engages a unit onto a tray. The tray includes an opening having a front block on the underside of the tray at the opening. The front block also includes a pin. The apparatus comprises a housing having an internal space and is placed in the unit such that the housing space is opened to an opening in the bottom of the unit. A control shaft extends from outside the apparatus and into the housing space to the backplate of the housing. The portion of the control shaft in the housing space is threaded. The external portion of the control shaft is accessible from the front of the unit. An L-shaped pawl has a foot and a rise, the foot of the pawl having a notch in the front edge of the foot.

Abstract: A method for navigating an aircraft around the earth's polar region comprises the steps of determining if the aircraft is in one of the polar regions of the earth's traditional axis system. If the aircraft is not in one of the polar regions, aircraft parameters, including speed and heading, are calculated relative to the traditional axis system. If the aircraft is in one of the polar regions the traditional axis system is rotated to form a new axis system, such that the aircraft position in the new axis system is in an essentially rectilinear area of the new axis system. The aircraft parameters are transformed, including aircraft position, speed, and heading, into parameters relative to the new axis system. New parameters are calculated with respect to the new axis system, and then the new parameters are translated into parameters with respect to the earth's traditional axis system.

Abstract: The method allocates a demanded amount of power to a plurality of power output apparatus, each power apparatus having characteristic curves associated therewith, and the total power outputted from the plurality of power apparatus results in a minimum cost for generating the power. Each boiler is allocated a quantity of waste fuel to be used in the generation of power, the quantity of waste fuel to be a predetermined total over a predetermined time period. Data is entered for each of the power apparatus into a controller. Optimal solutions are generated for all valid possible output power demands using an optimization by parts technique within bounds of each power apparatus. The solutions indicate the portion of power each power apparatus is to supply to provide the total power demanded at minimal cost. The solutions are stored in tables within a storage unit of the controller.

Abstract: The method allocates a demanded amount of power to a plurality of power output apparatus, each power output apparatus having an emissions curve associated therewith, such that each of the power output apparatus supplies a portion of the demanded power, and the total power outputted from the plurality of power output apparatus results in a minimum amount of emissions. Data is entered for each of the power output apparatus into a controller. Optimal solutions are generated for all valid possible output power demands using an optimization by parts technique within output power bounds of each of the power output apparatus. The solutions indicate the portion of power each power output apparatus is to supply to provide the total power demanded at minimal emissions output. The solutions are stored in tables within a storage unit of the controller. Upon receipt of a demand for power, a search is performed of the solution tables to obtain the amount of power each power output apparatus is to supply to meet the demand.

Abstract: The time of a second network is synchronized to a first network, each network having an independent timing subsystem, includes the following steps. The first network sends a first message to the second network, the first message being uniquely identified as a sync message. A first relative time is obtained within the first network of when the first message is transmitted. When the first network recognizes that the first message was sent, a second relative time is obtained to send a second message to the second network containing a real time of the first network that the first message was sent. The second network obtains a third relative time within the second network of when the first message is received. The real time of the first network contained in the second message is associated to the third relative time of the second network, thereby synchronizing the time of the second network to the time of the first network.

Abstract: A memory unit, made up of a plurality of BY-4 memory devices, has a plurality of computer words, each computer word including a predetermined number of data bits and a predetermined number of check bits. An error detection and correction (EDAC) apparatus interfaces with the memory unit for detecting and correcting a single bit error of the computer word, detecting a two bit error of the computer word, and detecting all two, three, and four bit errors of a single memory device. Matrix logic generates the check bits from preselected participating data bits of the data bits of the computer word being fetched. Compare gate logic compares check bits from the memory unit to corresponding check bits generated by the matrix logic to generate syndrome bits.

Abstract: Low cost components of a circuit board are calibrated in a test fixture to the same accuracy as a single high precision resistor, thereby eliminating the need for high precision, high cost components. The current through the resistor on the circuit board under test is ascertained by determining the current through the resistor by measuring the voltage of the high precision resistor. The voltage across the resistor under test is measured by a controller on the circuit board, thereby being able to calculate a high accuracy value for the resistor. The digital to analog converter (DAC) on the circuit board is calibrated by placing digital load values, or inputs, to the DAC and measuring the voltage across the corresponding calibrated resistors. Two values of inputs are used which define a line thereby calibrating the DAC.

Abstract: In an aircraft, there is included a Flight Management System (FMS), Autopilot and Autothrottle for controlling the aircraft. The apparatus has a plurality of outputs for definition of the real-time targets, controlled by the Autopilot and Autothrottle, to guide the vertical position of the aircraft to a desired vertical position along the desired vertical flightplan (or profile) according to a set of operational procedures. The FMS includes an apparatus that comprises an element which provides information denoting actual vertical position of the aircraft, and an element which generates information specifying the desired vertical position of the aircraft along the predetermined desired flightplan.

Abstract: A computer system, having external peripherals, includes an operating system and application packages residing therein. Data exchange logic permits an outside application package (generated by a third party to perform a predefined application function in a general purpose computer environment) to be integrated into the computer system. A data file containing information for making the necessary data available to the outside application package in the computer system is generated off-line. When the outside application package is executing in the computer system and it is desired to obtain the necessary data, a first package is accessed. The first package utilizes information contained in the data file to generate commands to obtain the necessary data. Information of the data file includes source information of the necessary data internal to or external to the computer system. If, however it is desired to output results of the predefined application function, a second package is accessed.

Abstract: In a computer system having fault recoverable capability, there is included a first and second data processing unit (DPU), wherein each of the first and second DPU is executing the same task essentially in parallel. Each DPU comprises a processor, a memory and a protected memory. The protected memory stores system data, such that the system data stored in the protected memory is immune from transient conditions. Also included is a monitor, which is operatively connected to the monitor of the other DPU. The monitor detects the occurrence of an upset to reinitialize the DPU, the DPU being reinitialized to a condition just prior to the occurrence of the upset thus avoiding utilization of any potentially erroneous data, and thereby permitting the DPU to return to its normal processing with valid data.

Abstract: The apparatus detects a difference of frequency between a first signal having a first frequency and a second signal having a second frequency, the first and second signals being digital signals. A phase shifter shifts the first signal such that the first signal and the shifted first signal are sufficiently out of phase to keep the rising and falling edges of the two signals from occurring at the same time thereby avoiding subsequent simultaneous triggering conditions and jitter conditions between the first and second signal. A first gate samples the second signal by the shifted first signal to output a first sampled signal. A second gate samples the second signal by the first signal to output a second sampled signal. A sample gate samples the first sampled signal and the second sampled signal to generate a difference signal, the difference signal containing a difference value of the frequency difference between the first and second signal.

Abstract: A multi-layered printed wiring board for high frequency application includes a first board of polytetrafluoroethylene (PTFE) having a metallic sheet on each side. The first side is etched to form high frequency circuity using micro-strip technology and the second side being a metallic sheet forming the ground plane. Laminated to the ground plane of the first board is a fiberglass board of thickness, A. Further, laminated to the fiberglass board is a second board of fiberglass having a thickness, A. The second board also has metallic sheets on both side, the side being laminated to the fiberglass board being etched to form strips, prior to being laminated, forming signal and transmission lines utilizing strip-line technology. Vias are formed to interconnect predetermined metallic layers.

Abstract: The method allocates a demanded amount of power to a plurality of power output apparatus, each power output apparatus having a cost curve associated therewith, such that each of the power output apparatus supplies a portion of the demanded power, and the total power outputted from the plurality of power output apparatus being optimally cost efficient. Data is entered for each of the power output apparatus into a controller. Solutions are generated for all possible output power demands using an optimization by parts technique within output power bounds of each of the power output apparatus. The solutions indicate the portion of power each power output apparatus is to supply to provide the total power demanded at the optimal cost efficient. The solutions are stored in tables within a storage unit of the controller. Upon receipt of a demand for power, a search is performed of the solution tables to obtain the amount of power each power output apparatus is to supply to meet the demand.

Abstract: In an aircraft which has a tracking system, the aircraft interrogates all target aircraft in the vicinity of the aircraft in order to determine potentially dangerous situations. The interrogation has a predetermined interrogation sequence which includes interrogation pulses and suppression pulses. The target aircraft respond to the interrogation with predetermined parameter information, the target aircraft sometimes responding to the suppression pulses of the interrogation resulting in an indication of false tracks to the monitoring aircraft. A method is implemented which reduces the false tracks resulting from replies to the suppression pulses. The method comprises the steps of forming tracks on responses to the interrogations wherein the responses meet a first set of predetermined criteria. The formed tracks are then identified as suppression pulse tracks or non-suppression pulse tracks in accordance with a second set of predetermined criteria.

Abstract: A controller of a control system, which operates as a master, has a slave input/output processor (IOP) connected thereto which communicates with at least one device of a predetermined type, and a backup slave IOP connected thereto of the same type as the slave IOP, the slave IOP operating as a primary IOP to the device. A method for providing backup to the slave IOP by the backup slave IOP comprises the steps of loading the backup slave IOP with the same data base as the slave IOP. The backup slave IOP eavesdrops on all communications from the controller to the slave IOP. When a write command is communicated to the slave IOP, the backup slave IOP taps the data from the bus and updates its data base. If the command is not a write command, ignores the communication. When a fault is detected by either the slave IOP or the backup slave IOP, the detection of the fault is communicated to the other IOP.

Abstract: A primary slave IOP, upon detecting an error, verifies the availability of a secondary slave IOP, and then sets an output control signal to indicate backup is requested. The primary slave IOP then takes itself out of being the primary. A secondary slave IOP, sensing that the output control signal from the other IOP has been set, assumes the roll of the primary slave IOP. A master controller, detecting an error with the primary slave IOP, interrogates the primary and secondary slave IOPs for a status input, and then arbitrates between the first and second IOP to determine the IOP that is to take on the primary role. Finally the master controller awards the more operational IOP the role of the primary slave IOP, thereby completing the failover operation.