Abstract: A non-magnetic magnetoresistive head for reading a magnetic pattern stored as domains in tracks on a storage device uses as the sensor a wafer of a high electron mobility non-magnetic semiconductor, such as indium antimonide or mercury-cadmium telluride, which includes an electrode configuration that includes an inner stripe electrode and an outer rectangular electrode surrounding the inner electrode. The wafer is supported so that the plane of the wafer is parallel to the disk and perpendicular to the magnetic field being sensed.

Abstract: A semiconductor device, which has a silicon body that includes at least one planar p-n junction that intersects a surface of the body, uses a multilayer arrangement that includes a first layer of thermally grown silicon dioxide, a second layer of Chemical-Vapor-Deposited (CVD) silicon nitride, a third layer of CVD oxygen-rich polysilicon, and a fourth layer of CVD silicon dioxide to passivate the junction. Common metallization contacts both the diffused region of the planar junction and the oxygen-rich polysilicon.

Abstract: A process for redesign of a sequential circuit to provide a functionally equivalent circuit that can operate with a shorter clock cycle. It includes forming a path graph of the circuit, classifying short and long arcs of the graph and developing sets of short and long path inequalities from which there is developed an objective function which is solved to provide an optimal set of delay constraints. These are used to synthesize a new circuit which after retiming results in the desired redesigned circuit.

Abstract: A computer system that includes a plurality of processing elements for parallel computation utilizes a free-space optical network for communication between the processing elements. Such a network employs an optoelectronic switch that includes a binary H-type tree for routing signals to selected ones of an array of lasers. Hybrid repeaters are included in the optical paths to generate output optical beams colinear that are with incident input beams.

Abstract: A number of layered vanadium oxide crystalline compositions are prepared by simple hydrothermal reactions. Generally, the compositions comprise parallel layers of mixed valence vanadium oxides with guest cations intercalated between the layers. The guest cations may comprise metal coordination complexes with bidentate ligands, monomeric ammonium or diammonium cations, or mixtures of alkali metal cations with monomeric ammonium cation or diammonium cations.

Abstract: Techniques for the generation of tests for detecting specified faults in circuits that include non-Boolean components and for identifying these undetectable faults that are logically redundant. The main features are: (1) only one Boolean variable is used to represent the value on a signal and all signals assume only Boolean values during the test generation procedure, (2) function of non-Boolean components is separated into Boolean and non-Boolean states, and energy functions are derived only for the Boolean state, and (3) non-Boolean states are implicitly considered in the energy minimization procedure.

Abstract: A magnetic sensor for use in a reading head for a magnetic disk is formed by depositing a plurality of planar superimposed layers of metals and semiconductors and using for the active element a planar structure formed orthogonal to the superimposed layers by their edges. Specifically, the edges of the superimposed layer form on the orthogonal planar surface a Corbino-disk structure in which conductive regions form inner and outer electrodes about an annular semiconductive region with high magnetoresistance, such as is provided by cadmium mercury telluride or indium antimonide.

Abstract: A technique for compensating for egomotion of the camera used to record a pair of two-dimensional views of a scene when the pair of images is to be used to provide a three dimensional representation of the scene. The technique involves comparing histograms of the intensity levels of pixels of corresponding epipolar lines in the pair of images for assumed amounts of egomotion to identify the amount that results in the smallest total of the sums of squared differences of the histograms.

Abstract: A high voltage silicon rectifier includes a substrate portion and an epitaxial mesa portion that is a frustrum of a pyramid with a substantially square cross section and side walls that make a forty five degree angle with the substrate portion. The mesa portion includes three germanium doped layers that introduce strain to speed up recombination of charge carriers.

Abstract: A computer system that includes a plurality of processing elements for parallel computation utilizes a free-space optical network for communication between the processing elements. Such a network employs an optoelectronic switch that includes a binary H-type tree for routing signals to selected ones of an array of lasers. Hybrid repeaters are included in the optical paths to generate output optical beams colinear that are with incident input beams.

Abstract: A new class of vanadium phosphate materials using a mixed valence pentavanadate as the building block has been created using hydrothermal self-assembly techniques. These materials use a framework composed solely of V.sub.5 O.sub.9 (PO.sub.4).sub.4/2 pentamers and apart from the cationic template contain some of the largest voids and cavities yet reported in open framework solids.

Abstract: A process for generating a test set for a sequential integrated circuit that includes performing a transformation on a software model of the circuit to provide a modified software model that should be more easily tested but that need not be functionally equivalent, and deriving a test set for the modified software model in conventional fashion. Thereafter, the derived test set is inverse mapped to derive a test set for the original sequential circuit. The transformation used essentially involves (1) the borrowing and/or returning registers at the primary inputs and/or primary outputs and (2) positioning the registers in the modified model as needed.

Abstract: A process for optimally retiming until delay sequential circuits involves first computing the optimal clock period of the circuit by a novel computation method and then relocating the flip flops in the circuit to provide the computed optimal clock period for the circuit. The optimal clock period is computed by viewing the circuit as an interconnection of path segments with pre-specified delays, constructing a path graph of the circuit that has as many vertices as there are latches in the circuit, and formulating an integer linear program to compute the minimum clock period .phi..sub.opt for which the path graph has no critical cycles. .phi..sub.opt is also the optimal clock period of the circuit.

Abstract: A technique for optimizing the speed of sequential synchronous digital circuits. First, the bottlenecks that prevent retiming for shortening the delay period are identified and then conditions to eliminate the bottlenecks are derived. This involves identifying the subcircuits associated with the bottlenecks, satisfying a set of timing constraints on the subcircuits, and developing a new circuit that meets the timing constraints. The new circuit free of bottlenecks can generally be retimed by relocation of the forward slack latches to reduce the clock period.

Abstract: Plasma etching apparatus includes a stack of quartz rings that are spaced apart to form slots therebetween and that are positioned to surround an interaction space between two electrodes of the apparatus where a plasma is formed during operation of the apparatus. The dimensions of the slots are chosen to insure that charged particles of spent gases in the plasma exiting the interaction space are neutralized by wall collisions as they exit the slots. Two voltage sources of different frequencies are used to apply voltages to the electrodes in a fashion that isolates each source from the other.

Abstract: A phase conjugate mirror is formed of a compound semiconductor doped with DX centers, such as silicon doped gallium-arsenide, through which are passed three light waves of the same wavelength but in different directions for non-linear four wave mixing. The phase conjugate mirror is used as one mirror of a confocal resonator housing a laser medium to form a laser and light from such laser is used to form the three waves of the same wavelength used to pump the phase conjugate mirror.

Abstract: A switching network that utilizes at least three degrees of freedom, time, wavelength and space. In one embodiment that involves point-to-point switching, each space channel between an input and an output is assigned a time slot and wavelength coordinate characteristic of the output and the input transmitter and output receiver are tuned to the appropriate time and wavelength coordinates and selective switching is used to complete the space channel between the input and output. In another embodiment for generalized switching, each input channel is assigned a set of space, time slot and wavelength coordinates and an input signal is broadcast to all of the outputs which selectively makes connection to those inputs with an appropriate set of coordinates.

Abstract: Different components of a computer are interconnected by a free space optical mesh-connected bus network using wavelength division multiple access. The network includes optical elements, such as cylindrical lens or mirrors, to transform a spot of light emitted by a source into a stripe of light that illuminates a row or column of detectors, of which one is tuned to the wavelength of the light for selection. By a succession of such networks appropriately oriented, routing in different perpendicular directions through the network is achieved, whereby any two nodes in a two-dimensional array of nodes can be interconnected.

Abstract: A VLSI circuit including memory is viewed as a finite state object machine and for testability a finite state test machine is embedded in the finite state object machine. To make the embedding practiced, the object test machine is partitioned into components and separate test machines are embedded into each component. The augmented components are then interconnected to form a composite machine for testing. To have the same test generation complexity as the object machine with a single embedded test function, there are special relations that have to be satisfied in the manner in which the test machines are embedded.

Abstract: A computer-implemented process for doing timing analysis of a VLSI sequential circuit that includes false paths. It includes the steps of transforming the circuit into a functionally equivalent .delta. path disjoint circuit for a given delay value and propagating all inverters to primary inputs of the circuit and performing a multifault test on all primary input fanouts of a particular length consisting solely either of all zoroes or of all ones.