Abstract: A rack for housing electrically powered components, the rack including: a power distribution bus configured to distribute AC power among components installed in the rack via direct coupling without cables; a plurality of slots, each slot configured to receive a component; and one or more components, each component installed in one of the plurality of slots, each component directly coupled to the power distribution bus without a cable, at least one of the components comprising an inter-rack power distribution unit (‘PDU’) configured to provide AC power to other components installed in the rack via the power distribution bus.

Abstract: Methods and apparatuses are disclosed for direct access to cache memory. Embodiments include receiving, by a direct access manager that is coupled to a cache controller for a cache memory, a region scope zero command describing a region scope zero operation to be performed on the cache memory; in response to receiving the region scope zero command, generating a direct memory access region scope zero command, the direct memory access region scope zero command having an operation code and an identification of the physical addresses of the cache memory on which the operation is to be performed; sending the direct memory access region scope zero command to the cache controller for the cache memory; and performing, by the cache controller, the direct memory access region scope zero operation in dependence upon the operation code and the identification of the physical addresses of the cache memory.

Abstract: Compute nodes of a parallel computer organized for collective operations via a network, each compute node having a receive buffer and establishing a topology for the network; selecting a schedule for a broadcast operation; depositing, by a root node of the topology, broadcast data in a target node's receive buffer, including performing a DMA operation with a well-known memory location for the target node's receive buffer; depositing, by the root node in a memory region designated for storing broadcast data length, a length of the broadcast data, including performing a DMA operation with a well-known memory location of the broadcast data length memory region; and triggering, by the root node, the target node to perform a next DMA operation, including depositing, in a memory region designated for receiving injection instructions for the target node, an instruction to inject the broadcast data into the receive buffer of a subsequent target node.

Abstract: Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

Abstract: A parallel computer including compute nodes, each including two reduction processing cores, a network write processing core, and a network read processing core, each processing core assigned an input buffer. Copying, in interleaved chunks by the reduction processing cores, contents of the reduction processing cores' input buffers to an interleaved buffer in shared memory; copying, by one of the reduction processing cores, contents of the network write processing core's input buffer to shared memory; copying, by another of the reduction processing cores, contents of the network read processing core's input buffer to shared memory; and locally reducing in parallel by the reduction processing cores: the contents of the reduction processing core's input buffer; every other interleaved chunk of the interleaved buffer; the copied contents of the network write processing core's input buffer; and the copied contents of the network read processing core's input buffer.

Abstract: Methods, parallel computers, and computer program products are disclosed for remote direct memory access.

Abstract: Heat sinks for distributing a thermal load are disclosed that include: a bottom plate; a front top plate; a back top plate; and a plurality of heat-dissipating fins connected to the bottom plate, the front top plate, and the back top plate, wherein the front top plate and the back top plate are separated by a predetermined distance.

Abstract: Methods, apparatus, and products for maintaining RFID information for virtual machines are disclosed that include establishing a virtual machine on a host computer, the host computer capable of supporting a plurality of virtual machines, the host computer comprising one or more RFID transponders; determining RFID information for the virtual machine; storing, in a specified one of the RFID transponders, the determined RFID information for the virtual machine; and upon request from an RFID reader, transmitting the stored RFID information as output from the specified RFID transponder to the requesting RFID reader.

Abstract: Identifying an optimized test bit pattern for analyzing electrical communications channel topologies, including: ranking according to channel quality, from worst to best, a set of channel topologies for an electrical communications channel; and for each ranked channel topology beginning with the worst, carrying out the following steps in an iterative loop until a concatenated test bit pattern and a previously optimized test bit pattern are functionally equally fit: concatenating to a previously optimized test bit pattern an additional test bit pattern; optimizing the concatenated test bit pattern values for a next ranked channel in the subset, leaving the optimized values of the previously optimized test bit pattern unchanged; and comparing through use of a fitness function the relative qualities of the previously optimized test bit pattern and the optimized concatenated test bit pattern.

Abstract: A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB.

Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.

Abstract: A cover latch is provided for coupling a blade server cover to a blade server when the cover latch is in a locked state. Embodiments include a locking surface at one end of the cover latch; a user interface at an end of the cover latch opposite from the end with the locking surface; wherein when the cover latch is in the locked state, the locking surface engages a locking surface enclosure of the blade server cover; wherein when the cover latch is in an unlocked state, the user interface is rotated into the blade server and the locking surface is rotated outward from the blade server, wherein when the locking surface is rotated outward from the blade server, the locking surface is disengaged from the locking surface enclosure of the blade server cover; and a rotational limiter hole in the cover latch that surrounds a peg of the blade server, wherein the rotation of the locking surface and the user interface is limited by the rotational limiter.

Abstract: Measuring control signal timing for synchronous dynamic random access memory (‘SDRAM’), including combining into a trigger signal for an oscilloscope display control signals of an SDRAM under test, the control signals derived only from a single type of memory operations; and driving, continually during both READ and WRITE operations to and from the SDRAM under test, the oscilloscope display with a memory bus data signal (‘DQ’) and a memory bus clock signal (‘DQS’) from the SDRAM under test.

Abstract: Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by opening switches on the first die, converting the TSVs previously connected through the open switches into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by opening switches on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.

Abstract: Methods, computers, and products for managing power consumption of a computer, the computer including a computer processor and managing power consumption of a computer includes: dynamically during operation of the computer, setting, by an in-band power manager in dependence upon performance metrics of the computer processor, a current performance state (‘p-state’) of the computer processor; and providing, by the in-band power manager to an out-of-band power manager, the current p-state of the computer processor.

Abstract: Scheduling cool air jobs in a data center comprising computers whose operations produce heat and require cooling, cooling resources that provide cooling for the data center, a workload controller that schedules and allocates data processing jobs among the computers, a cooling controller that schedules and allocates cooling jobs among cooling resources, including assigning data processing jobs for execution by computers in the data center; providing, to the cooling controller, information describing data processing jobs scheduled for allocation among the computers in the data center; specifying, by the cooling controller in dependence upon the physical location of the computer to which each job is allocated and the quantity of data processing represented by each job, cooling jobs to be executed by cooling resources; and assigning, by the cooling controller in accordance with the workload allocation schedule to cooling resources in the data center, cooling jobs for execution.

Abstract: Methods, apparatus, and products are disclosed for budget-based power consumption for application execution on a plurality of compute nodes that include: assigning an execution priority to each of one or more applications; executing, on the plurality of compute nodes, the applications according to the execution priorities assigned to the applications at an initial power level provided to the compute nodes until a predetermined power consumption threshold is reached; and applying, upon reaching the predetermined power consumption threshold, one or more power conservation actions to reduce power consumption of the plurality of compute nodes during execution of the applications.

Abstract: Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

Abstract: Aspects to ensure maintenance of individual government benefits in a retail environment include identifying of an individual shopper with an associated level of available benefits during a shopping session. Purchases relative to predetermined criteria, including the associated level of available benefits, are tracked. Scheduling a next appointment during the shopping session for the individual shopper with an agency providing the government benefits based on the tracking occurs, wherein a potential lapse in benefits is avoided.

Abstract: Methods, apparatus, and products are disclosed for scheduling applications for execution on a plurality of compute nodes of a parallel computer to manage temperature of the plurality of compute nodes during execution that include: identifying one or more applications for execution on the plurality of compute nodes; creating a plurality of physically discontiguous node partitions in dependence upon temperature characteristics for the compute nodes and a physical topology for the compute nodes, each discontiguous node partition specifying a collection of physically adjacent compute nodes; and assigning, for each application, that application to one or more of the discontiguous node partitions for execution on the compute nodes specified by the assigned discontiguous node partitions.