Abstract: A random access memory, having multi-bit memory cells, includes a successive approximation analog-to-digital (SAAD) converter and a comparator for reading data from the memory cells. In reading data from a cell, the SAAD generates a first reference voltage. This first reference voltage is compared, by the comparator, to the voltage stored in the cell to derive a first comparison result. Based on this first comparison result, a first bit of data is determined. Thereafter, the SAAD generates a second reference voltage based on the first reference voltage and the first comparison result. This second reference voltage is compared, by the comparator, to the voltage stored in the cell to derive a second comparison result. Based on this second comparison result, a second bit of data is determined.