Abstract: A single chip superheterodyne AM receiver is disclosed herein. The receiver has a control pin for application of control signals to adjust a frequency response of a baseband filter to tailor its frequency response to a particular type of signal received by the receiver. Various techniques are described for enabling a complete superheterodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.

Abstract: A misalignment compensation technique for a dot printer is disclosed. This technique first supplies printing instructions to a printhead for energizing printing elements in various groups (primitives) to print a pattern on a medium. The printed pattern is then detected by optical sensors in the printer. Based on the detection, a position offset error for each primitive is determined. These errors are used to generate a separate time correction for each of the primitives such that, when the printer is used normally, the time period for printing a dot will be advanced or delayed for each primitive so as to align the dots printed by the primitives. In another embodiment, alignment data taken by a manufacturing line sensor is stored in a memory on the print cartridge. After the print cartridge is installed in the printer, a second optical test completes the data needed to create timing correction values.

Abstract: A universal serial bus transceiver is disclosed. In one embodiment, the transceiver includes a differential transmitting amplifier with a first input terminal that receives a reference voltage, a second input terminal that receives a first data input signal at a level corresponding to the reference voltage, and a third input terminal that receives a second data input signal at the reference voltage level. The differential transmitting amplifier generates first and second bus data output signal at the bus signal level in response to the first and second data input signals. The transceiver also includes a first receiving amplifier with a first input terminal that receives the reference voltage and a second input terminal that receives a first bus data input signal at the bus signal level. The first receiving amplifier generates a first data output signal at the reference voltage level.

Abstract: A fan speed control system for controlling the operation and speed of a fan is described. The fan speed control system includes a power control block for supplying an output voltage to the fan. An integrated circuit fan controller causes a resistor divider circuit to operably divide a selected portion of the output voltage. The integrated circuit fan controller comprises a data register which receives values indicative of control or speed operands from a host. A logic state machine translates these values into appropriate logic signals and provides the signals to the resistor divider circuit. A timing reference or an oscillator controls the proper sequencing and timing relationship of the logic state machine. To turn the fan on, the following sequence of steps occurs. The power control block is turned off causing the output voltage not to be supplied to the fan. The logic state machine controls the resistor divider circuit to divide the output voltage to be supplied to the fan.

Abstract: A light emitting device and a method of fabricating the device utilize a supplementary fluorescent material that radiates secondary light in the red spectral region of the visible light spectrum to increase the red color component of the composite output light. The secondary light from the supplementary fluorescent material allows the device to produce “white” output light that is well-balanced with respect to color for true color rendering applications. The supplementary fluorescent material is included in a fluorescent layer that is positioned between a die and a lens of the device. The die is preferably a GaN based die that emits light having a peak wavelength of 470 nm. The fluorescent layer also includes a main fluorescent material. Preferably, the main fluorescent material is Cerium (Ce) activated and Gadolinium (Gd) doped Yttrium Aluminum Garnet (YAG) phosphor (“Ce:YAG phosphor”).

Abstract: A laser diode that is constructed in a trench in a manner such that the material in the trench acts as a waveguide. The laser diode includes a first contact layer constructed from a first semiconducting material of a first carrier type, the first semiconducting material having a first index of refraction. The first contact layer has a trench therein. The trench has a layer of a second semiconducting material of the first carrier type on the bottom surface. The index of refraction of the second semiconducting material is at least one percent greater than the index of refraction of the first semiconducting material. The laser also includes a first dielectric layer covering the first layer in those regions outside of the trench and a first cladding layer constructed from a third semiconducting material of the first carrier type. The first cladding layer overlies the dielectric layer. An active layer overlies the first cladding layer.

Abstract: The invention is a method for designing semiconductor light emitting devices such that the side surfaces (surfaces not parallel to the epitaxial layers) are formed at preferred angles relative to vertical (normal to the plane of the light-emitting active layer) to improve light extraction efficiency and increase total light output efficiency. Device designs are chosen to improve efficiency without resorting to excessive active area-yield loss due to shaping. As such, these designs are suitable for low-cost, high-volume manufacturing of semiconductor light-emitting devices with improved characteristics.

Abstract: A superhetrodyne AM receiver and digital decoder are formed on the same chip. The frequency responses of the various filters are tied to the reference frequency. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers, filters, and other components in the system are adjusted based on frequency control signal in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver. The IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete superhetrodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.

Abstract: A method for controlling a polar coordinate stage moves an object relative to an imaging system. While moving the object, the image of the object is rotated to compensate for rotation of the object. Accordingly, the orientations of features in the image are preserved, and removal of apparent rotation in the image reduces confusion an operator experiences while directing movement of the object. The angular velocity of the motion of the object is controlled so that image shift speed is independent of the radial position of the point being viewed. Use of a polar stage, reduces the required foot print for a stage and facilitates prealignment. In particular, an edge detector measures the position of the edge of the object while the polar coordinate stage rotates the object. A prealignment process determines the position and orientation of the object from the measured edge positions.

Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.

Abstract: A tool and a method for adjusting a space between a printhead in a print cartridge and a platen in an ink jet printer are disclosed. The shape of the tool mimics the shape of a print cartridge. The tool is inserted into an aperture in a carriage in place of the print cartridge whose printhead is the closest to the platen, or, if all of the printheads are equally close to the platen, then the tool may be inserted in place of any of the print cartridges. The tool includes a thin flexible member that extends toward the platen. The length of the member is such that, when the tool is properly inserted into the aperture and contacts the platen, then the printhead to platen spacing at that point on the platen would be just equal to a minimum acceptable spacing between a printhead in the same aperture and the platen.

Abstract: A light emitting device includes a heterojunction having a p-type layer and an n-type layer. The n-electrode is electrically connected to the n-type layer while the p-electrode is electrically connected to the p-type layer. The p and n-electrodes are positioned to form a region having uniform light intensity.

Abstract: A voltage monitor circuit for monitoring a first voltage includes a switch and a comparator. The switch has a first position and a second position. When the switch is in the first position, the switch connects the comparator to a first voltage terminal to monitor a second voltage. When the switch is in the second position, the switch connects the comparator to a second voltage terminal to monitor a third voltage. The second and third voltages are scaled voltages of the first voltage to be monitored. The comparator provides an output signal indicating a status of the first voltage, that is, whether the first voltage is within an operative range. The voltage monitor circuit may further include a voltage divider connected between the first voltage and a ground potential. The voltage monitor circuit of the present invention can be incorporated in an electrical system for monitoring a battery voltage.

Abstract: A monitoring device is used to monitor the performance of a burnishing apparatus that uses a burnishing tape. The monitoring device monitors the contact between the burnishing tape and the disk. The monitoring device may include an acoustic emission sensor, e.g., a piezo-electric transducer, that is mounted on the elements that press the burnishing tape into contact with the disk. Elastic waves that are produced by the contact between the burnishing tape and the disk propagate through the pressure applying element, received by the sensor and are converted into electric signals. The electric signals from the sensor are converted into amplitude signals in the time domain and/or signals in the frequency domain. Alternatively, the monitoring device may measure the elastic waves propagating through the disk, the tension on the burnishing tape, and/or the frictional force between the burnishing tape and the disk.

Abstract: A method of forming a light-transmissive contact on a p-type Gallium nitride (GaN) layer of an optoelectronic device includes in one embodiment, introducing a selected metal in an oxidized condition, rather than oxidizing the metal only after it has been deposited on the surface of the p-type GaN layer. In some applications, the oxidized metal provides sufficient lateral conductivity to eliminate the conventional requirement of a second highly conductive contact metal, such as gold. If the second contact metal is desired, an anneal in an oxygen-free environment is performed after deposition of the second layer. The anneal causes the second metal to penetrate the oxidized metal and to fuse to the surface of the p-type GaN layer. In a second embodiment, the oxidation occurs only after at least one of the two metals is deposited on the surface of the p-type GaN layer.

Abstract: Light emitting devices having a vertical optical path, e.g. a vertical cavity surface emitting laser or a resonant cavity light emitting or detecting device, having high quality mirrors may be achieved using wafer bonding or metallic soldering techniques. The light emitting region interposes one or two reflector stacks containing dielectric distributed Bragg reflectors (DBRs). The dielectric DBRs may be deposited or attached to the light emitting device. A host substrate of GaP, GaAs, InP, or Si is attached to one of the dielectric DBRs. Electrical contacts are added to the light emitting device.

Abstract: A single chip superhetrodyne AM receiver is disclosed herein. To compensate for process variations in the implementation of the IC, bias currents setting the operating conditions for various amplifiers and other components in the system are adjusted based on frequency control signals in a PLL circuit in the local oscillator. Since the magnitude of the control signal reflects the process variations, the bias currents are adjusted based on the control signal to offset these variations in other portions of the receiver. To further improve the signal to noise ratio of the receiver, the IF filter is tuned within a range so as not to include any integer multiple or integer divisor of the timing reference frequency. Various techniques are described for enabling a complete superhetrodyne AM receiver to be implemented on a single chip which receives an antenna input signal and outputs a digital data signal.

Abstract: An LED package includes a heat-sinking slug that is inserted into an insert-molded leadframe. The slug may include an optional reflector cup. Within this cup, the LED and a thermally conducting sub-mount may be attached. Wire bonds extend from the LEDs to metal leads. The metal leads are electrically and thermally isolated from the slug. An optical lens may be added by mounting a pre-molded thermoplastic lens and a soft encapsulant or by casting epoxy to cover the LED or by a cast epoxy lens over a soft encapsulant.

Abstract: In the present invention, an interfacial layer is added to a light-emitting diode or laser diode structure to perform the role of strain engineering and impurity gettering. A layer of GaN or AlxInyGa1−x−yN (0≦x≦1, 0≦y≦1) doped with Mg, Zn, Cd can be used for this layer. Alternatively, when using AlxInyGa1−x−yN (x>0), the layer may be undoped. The interfacial layer is deposited directly on top of the buffer layer prior to the growth of the n-type (GaN:Si) layer and the remainder of the device structure. The thickness of the interface layer varies from 0.01-10.0 &mgr;m.

Abstract: A controller for limiting the current through a pass transistor is described herein that includes an NMOS control transistor coupled between the gate of the pass transistor and ground. The gate of the NMOS control transistor is coupled to a bootstrap circuit via a PMOS transistor. The PMOS transistor is turned on in the event of a current limit signal to momentarily apply the bootstrap voltage to the gate of the NMOS control transistor. This quickly turns on the NMOS control transistor to discharge the gate of the pass transistor, shutting off the pass transistor and terminating the high current situation. After the bootstrapped voltage has been shunted to ground, a reverse biased diode allows the gate of the NMOS control transistor to remain charged to keep the NMOS control transistor on. After the current limit situation has passed, the NMOS control transistor is switched off.