Abstract: A system and method for managing memory data is provided. Data stored within a main memory may be requested by multiple requesters that may include one or more cache memories. When the data is provided by the main memory to a requester, it will be provided in a state that is based on the way the data was recently used by the requesters. For example, if a pattern of read-only usage has been established for the data, the data will be returned to a requester in a shared state. If data that was provided in a shared state must be updated such that the requester is required return to main memory to obtain read/write privileges, the main memory will thereafter provide the data in an exclusive state that allows write operations to be completed. This will continue until a pattern of read-only usage is again established.

Abstract: A boatlift leg and frame structure utilizing a ball screw lifting mechanism driven by a reversible electric motor to raise and loser a boat support carriage. The raising and lowering operation of the ball screw mechanism is controlled by electronic circuitry that includes wired and remote direction selection; lifting logic with conflict detection and direction reversal delay; lighting control logic; motor power control; and overload detection logic to detect lifting overload and disable power to the motor power control. A drive train mechanism converts high-speed low torque rotation of the motor drive shaft to low-speed high-torque rotation drive of the ball screw. A boatlift leveling mechanism associated with one or more legs of the boatlift includes a ground engaging footpad, an extendible leg, a height adjusting screw mechanism and a height adjusting actuator with mating bevel gears coupled to the height adjusting screw for allowing adjustment through the side of a boatlift leg.

Abstract: An Operating System (OS) function maps affinity to processors for each new task and except for certain circumstances where other processors are permitted to steal tasks, this affinity remains unchanged. Hierarchical load balancing is mapped through an affinity matrix (that can be expressed as a table) which is accessed by executable code available through a dispatcher to the multiplicity of instruction processors (IPs) in a multiprocessor computer system. Since the computer system has multiple layers of cache memories, connected by busses, and crossbars to the main memory, the hierarchy mapping matches the cache memories to assign tasks first to IPs most likely to share the same cache memory residue from related tasks, or at least less likely to incur a large access time cost. Each IP has its own switching queue (SQ) for primary task assignments through which the OS makes the initial affinity assignment.

Abstract: The present invention provides methods and apparatus for authorizing a temporary or permanent increase in the performance of a data processing system while providing little or no down time. This is accomplished by including extra or additional computer resources in the data processing system when, for example, it is provided to the customer. However, only those resources required to achieve the performance level purchased by the customer are enabled for use during normal operation. To temporarily or permanently increase the performance level of the data processing system, the customer purchases an authorization key. When the customer desires increased performance, the authorization key is registered on the data processing system, which enables the use of additional hardware resources. The authorization key may be used akin to an insurance policy that allows selective increases in performance level to accommodate unplanned increases in performance requirements.

Abstract: A method for calculating and recalculating hardware requirements for a database management system computer. One method includes establishing default values for hardware utilization limits such as percent utilization of processors or network interface cards. Working copies of the hardware utilization limits can be initialized to the default utilization limits. Workload requirements can be obtained from a human user. In one method, the workload requirements are obtained as transactions per second value. In another embodiment, the workload requirements are obtained as a detailed list of transactions, expected execution rate of those transactions, and the composition of those transactions, including SQL statement type and parameters upon which those statements operate. The hardware requirements are then calculated so as to be within the hardware utilization limits, and can include discrete numbers of required hardware components such as processors and network interface cards.

Abstract: A method of and apparatus for improving the efficiency of a data processing system employing a multiple level cache memory system. The efficiencies result from enhancing the response to SNOOP requests. To accomplish this, the system memory bus is provided separate and independent paths to the level two cache and tag memories. Therefore, SNOOP requests are permitted to directly access the tag memories without reference to the cache memory. Secondly, the SNOOP requests are given a higher priority than operations associated with local processor data requests. Though this may slow down the local processor, the remote processors have less wait time for SNOOP operations improving overall system performance.

Abstract: A method and apparatus for reusing a thread for different programmed operations are provided in various embodiments. In one embodiment, different application operations are defined as subclasses of a thread operation class, and a thread is implemented with a thread class. In one embodiment, the application operations can be queued to the thread for scheduled execution using the thread. In another embodiment, a first application operation can start a thread and be executed therewith, while a second application operation can attach to the thread for execution.

Abstract: An apparatus for and method of utilizing an Internet terminal coupled to the world wide web to interface with an existing proprietary data base management system through a user interface which permits access to an application service by presentation of one of a plurality of display pages which differ from one another only in resolution. The use of one of a plurality of nearly identical display pages offers a highly efficient way of optimizing the user interface from one work station to another.

Abstract: An apparatus for and method of utilizing an internet terminal coupled to the world wide web to access an existing proprietary data base management system having a dialog-based request format. The internet terminal transfers a service request to the data base management system, having a password provided as required. When a service request is made having an expired password, the data base management system recognizes the problem. The internet terminal is queried for certain parameters, and the data base management system automatically reassigns a new and unexpired password.

Abstract: The current invention provides an improved system and method for locking shared resources. The invention may operate in a data processing environment including a main memory system coupled to multiple instruction processors (IPs). Lock-type instructions are included within the hardware instruction set of ones of the IPs. These lock-type instructions are executed to gain access to a software-lock stored at a predetermined location within the main memory. After activating the software-lock, further, indivisible execution of the lock-type instruction causes one or more addresses associated with the software-lock to be retrieved. These addresses are used as pointers to, in turn, retrieve the data signals protected by the software-lock. Requests for the protected data signals are issued automatically by the hardware on behalf of the requesting IP, and the IP is allowed to continue instruction execution.

Abstract: Methods and systems are provided for efficiently predicting the instruction execution efficiency of a proposed computer system. This is accomplished by first measuring or otherwise obtaining actual instruction execution efficiency values for two or more actual computer systems. The actual instruction execution efficiency values are preferably measured using a sufficient number of actual computer systems that have a sufficient variety of resource allocations to create a statistically significant pool of information or data. Using this pool of information or data, a predicted instruction execution efficiency value is calculated for a proposed computer system having a proposed allocation of resources of the first resource type and the second resource type. This is preferably accomplished by performing a multi-variant regression analysis of selected actual instruction execution efficiency values in the pool of information or data.

Abstract: An apparatus for and method of queuing memory access requests resulting from level two cache memory misses. The requests are preferably queued separately by processor. To provide the most recent data to the system, write (i.e., input) requests are optimally given preference over read (i.e., output) requests for input/output processors. However, instruction processor program instruction fetches (i.e., read-only requests) are preferably given priority over operand transfers (i.e., read/write requests) to reduce instruction processor latency.

Abstract: A modular, expandable, multi-port main memory system that includes multiple point-to-point switch interconnections and a highly-parallel data path structure that allows multiple memory operations to occur simultaneously. The main memory system includes an expandable number of modular Memory Storage Units, each of which are mapped to a portion of the total address space of the main memory system, and may be accessed simultaneously. Each of the Memory Storage Units includes a predetermined number of memory ports, and an expandable number of memory banks, wherein each of the memory banks may be accessed simultaneously. Each of the memory banks is also modular, and includes an expandable number of memory devices each having a selectable memory capacity. All of the memory devices in the system may be performing different memory read or write operations substantially simultaneously and in parallel.

Abstract: A method of and apparatus for efficiently and effectively coupling a newly designed peripheral device to a legacy data processing system. The approach utilizes emulation of a SCSI tape device by a SCSI DVD device. Through device emulation, system-wide modifications are minimized.

Abstract: A method and apparatus for creating sets of parameters values for scenarios for testing a computing arrangement. In a first phase of parameter optimization, each parameter value is adjusted one at a time, and a measured performance characteristic controls when to stop considering alternative values for the parameter. When the performance characteristic satisfies selected criteria relative to the target data set, another parameter value is selected for adjustment. Each parameter is assigned to a group as a function of the level of change of the performance characteristic from one value of the parameter to another. In a second phase of parameter optimization, each parameter value is adjusted in order of parameters in groups that exhibit greater levels of change of the performance characteristic to parameters in groups that exhibit lesser levels of change of the performance characteristic.

Abstract: A tool management system and interface for a disparate set of data processing tools is disclosed. A main tool menu allows selected tools to be launched so that each tool populates a respective window. A tool is selected by choosing an associated window as the currently-active window. Next, a list of all data items that are available for processing by the tool set may be obtained. A data item that is to undergo processing may be selected. A user interface provides a list of all operations that may be used to process the selected data item, including those operations that are supported by the currently-selected tool, and those operations that are not supported by the selected tool. Following selection of the operation, processing of the selected data item is completed by automatically invoking the appropriate tool.

Abstract: A system and method for processing I/O requests in a computing system. I/O packets are created via an operating system associated with the computing system, where the I/O packets include I/O transaction information. The I/O packets are made accessible to an I/O system. A command for a channel type connecting a target I/O component to the I/O system is constructed, where this command construction is based on the I/O transaction information provided in the I/O packet, and based on physical aspects of the target I/O component and channel type provided independently of the I/O packet. The constructed command is issued to the target I/O component in accordance with the channel type.

Abstract: A method of and apparatus for improving the scheduling efficiency of a data processing system using the facilities which maintain coherency of the system's level cache memories. These efficiencies result from monitoring the cache memory lines which indicate invalidation of a cache memory entry because of a storage operation within backing memory. This invalidity signal is utilized to generate a doorbell type interface indication of a new application entry within the work queue.

Abstract: A process-driven object management system for managing data and code modules is disclosed. The object management system includes a repository that stores objects, wherein ones of the objects referred to as “Asset elements” each describe a respective code or data module. The object management system includes a set of scripted tools for performing renovation, transformation, and code development tasks on the code and data modules. According to one aspect of the invention, the tool invocation constructs are stored as objects in the repository, such that some of the same object management tools and automated repository interface functions used to manage the Asset element can also be used to manage and veiw the tool objects.

Abstract: A computer code debugging system. The computer code debugging system preferably includes a first computer and a second computer, but this is not required in all embodiments. The first computer may be, for example, a high performance mainframe system having hosting a simulator and debugger, and the second computer may be, for example, a lower cost generic personal computer or workstation that has superior graphic user interface (GUI) capabilities relative to the first computer. In some embodiments, the GUI on the second computer includes windows for displaying high level source code, corresponding computer machine language code, and/or corresponding machine code binary, as desired. The high level window and/or the computer machine language window may be used in some embodiments to interactively control the simulation of the machine code binary on the first computer, as desired.