Patents Represented by Attorney, Agent or Law Firm Charles J. Fassbender
  • Patent number: 5459352
    Abstract: An integrated circuit package includes an integrated circuit chip, a substrate which holds the chip, and a heat conduction mechanism which provides a path for conducting heat from the chip to a fluid medium; wherein the heat conduction mechanism is characterized as having a pressed joint which is comprised of: 1) a member that is made primarily of aluminum or copper, having a solid polysiloxane coating of less than 200 .ANG. thickness, and 2) a liquid metal alloy in contact with the coating. This solid coating, on the aluminum or copper member, is fabricated without any expensive equipment by the steps of: 1) forming a liquid coating of a polysiloxane solution on the aluminum or copper member; and 2) baking that member with its liquid coating at temperatures of 100.degree. C.-300.degree. C. for 0.5 hours-3.0 hours. Thereafter the integrated circuit package is completed by placing the member with its solid coat in the heat conducting path such that a liquid metal alloy is in contact with the solid coat.
    Type: Grant
    Filed: May 10, 1994
    Date of Patent: October 17, 1995
    Assignee: Unisys Corporation
    Inventors: Wilber T. Layton, Blanquita O. Morange, Angela M. Torres, James A. Roecker
  • Patent number: 5454159
    Abstract: To manufacture I/O terminals on I/O pads of an electronic component, the electronic component, together with a transparent alignment component which has a reference feature, is placed in a fixture such that the I/O pads are seen through the alignment component and a first one of the two components has a fixed position in the fixture. Thereafter, a second one of the two components is moved in the fixture until a particular position is reached where the I/O pads are aligned with the reference feature; and at that particular position the second one of the two components is confined. Subsequently, the alignment component is replaced at its particular position in the fixture, as attained by the above steps, with an opaque template which has a hole pattern that matches and aligns with the I/O pads. Then, the template hole pattern as positioned by the replacing step, is used to fabricate the I/O terminals on the I/O pads.
    Type: Grant
    Filed: February 18, 1994
    Date of Patent: October 3, 1995
    Assignee: Unisys Corporation
    Inventor: Ronald A. Norell
  • Patent number: 5455914
    Abstract: In a data processing system, a command sending module sends a command over a bus to two command executing modules at the same time, and that command is to be performed by either one, but not both, of the command executing modules.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: October 3, 1995
    Assignee: Unisys Corporation
    Inventors: Seyed H. Hashemi, Richard M. Linnell
  • Patent number: 5453998
    Abstract: An array processing circuit which operates on a M row-N column array of digital words includes a first set of N memories, each of which asynchronously receives a respective column of words from a separate input channel; and, a second set of N memories which have respective inputs that are coupled to corresponding outputs of the first set of memories. A first addressing circuit detects when each memory of the first set contains a respective word of the same row, and in response transfers that row of words in parallel to the second set of memories. N-1 column error detect circuits respectively detect when a column of words from the first N-1 memories of the first set has an error.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: September 26, 1995
    Assignee: Unisys Corporation
    Inventor: Kim C. Dang
  • Patent number: 5446848
    Abstract: An entry level data processing system is expandable, with low overhead, by a factor of two to a partitionable upgraded data processing system. This entry level system includes: 1) one system bus, 2) a central processing module (CPM), an input/output module (IOM), and a system control module (SCM)--all of which have one system bus port coupled to the system bus, 3) a memory module coupled via a memory bus to the system control module, and 4) a system expansion interface through which the entry level system is expanded to the upgraded system. In one particular preferred embodiment, the system expansion interface consists of a) a first connector on the SCM for externally connecting to and communicating with the memory bus, b) a second connector on the SCM for externally connecting to and communicating with the system bus, and c) an extension of the system bus through a switch in the SCM and a third connector on the SCM for externally connecting to and communicating with the extended system bus.
    Type: Grant
    Filed: June 25, 1993
    Date of Patent: August 29, 1995
    Inventors: Gary C. Whitlock, Richard D. Freeman, Keith S. Saldanha
  • Patent number: 5444722
    Abstract: A memory module is used in multiples on a bus in a data processing system. Each memory module comprises a plurality of storage cells, an input circuit for receiving a read command and a read address from the bus, and a compare circuit which generates a match signal when the read address is within a selectable address range for the storage cells. Also, the module further includes: a control circuit, coupled to the compare circuit, which responds to the match signal by almost always executing the read command in a small time interval on the bus and occasionally executing the read command in a long time interval. Further, the module includes a bus transmit circuit, coupled to the control circuit, for sending a control signal on the bus if the control circuit selects the long time interval.
    Type: Grant
    Filed: February 17, 1993
    Date of Patent: August 22, 1995
    Assignee: Unisys Corporation
    Inventor: Dan T. Tran
  • Patent number: 5441195
    Abstract: A method of stretching solder joints between the input/output pads of an electrical component and corresponding input/output pads on a substrate includes the steps of: melting the solder joints; confining the component while the solder joints are melted such that the component can only move substantially perpendicular to the substrate; pulling the component, while the component is confined, by an external force in a direction away from the substrate to thereby stretch the melted solder joints; compelling the movement of the component to stop when the component has moved a predetermined distance; and, solidifying the solder joints while the component is compelled to stop. By stretching the solder joints with the above method, the solder joint shape can be changed from convex to concave; and thermally induced stress/strain in the joint is substantially reduced.
    Type: Grant
    Filed: January 13, 1994
    Date of Patent: August 15, 1995
    Assignee: Unisys Corporation
    Inventors: Jerry I. Tustaniwskyj, Maria D. Alvarez, Steve J. Bezuk, Robert E. Rackerby, Patrick A. Weber
  • Patent number: 5424580
    Abstract: An electro-mechanical assembly includes a high power IC package and a low power IC package which are mounted with a space between them on a single substrate. Both of these IC packages have flat top surfaces which dissipate heat; and due to various manufacturing tolerances, those surfaces are non-coplanar with respect to each other. To cool these two IC packages, a single heat sink is provided which has a thin flat core that overlies both of the IC packages as well as the space between them, and cooling fins extend from the top of the core.
    Type: Grant
    Filed: November 1, 1993
    Date of Patent: June 13, 1995
    Assignee: Unisys Corporation
    Inventors: Jerry I. Tustaniwskyj, Stephen A. Smiley
  • Patent number: 5407851
    Abstract: A memory cell includes a pair of spaced apart conductors on an insulating layer, and a novel electrically alterable resistive component between the conductors. This resistive component consists essentially of a single element semiconductor selected from the group of Si, Ge, C, and .alpha.-Sn, having a crystalline grain size which is smaller than polycrystalline. Dopant atoms in the semiconductor are limited to be less than 10.sup.17 atoms/CM.sup.3 ; and, such a doping range includes zero doping. Process temperatures are limited such that all dopant atoms are interstitial in the semiconductor crystals and not substitutional.
    Type: Grant
    Filed: October 7, 1993
    Date of Patent: April 18, 1995
    Assignee: Unisys Corporation
    Inventor: Bruce B. Roesner
  • Patent number: 5408657
    Abstract: A method, in a data processing system, of imposing constraints on data files which are changed by update statements, includes the steps of: a) identifying a particular object of the update O.sub.x and a particular attribute being updated; b) finding an applicable constraint based on the particular attribute being updated; c) converting the particular update object O.sub.x to at least one other object which is in the applicable constraint and is different than the update object O.sub.x ; and, d) generating an error message, if after the update, the applicable constraint is not satisfied by any object from the converting step.
    Type: Grant
    Filed: May 17, 1994
    Date of Patent: April 18, 1995
    Assignee: Unisys Corporation
    Inventors: Richard H. Bigelow, John P. Thompson
  • Patent number: 5406489
    Abstract: An instrument for indirectly measuring the attitude of a moving aircraft includes three accelerometers, a GPS radio receiver, an electronic estimating module, and an electronic output module. The three accelerometers indicate three accelerations of the aircraft respectively along three aircraft body axes. The GPS radio receiver receives from GPS satellites the position and velocity of the aircraft along an earth fixed axis. The electronic estimating module estimates a vector such that a series of aircraft position changes along the three body axes that are caused by the measured accelerations, times the vector, approximately matches a corresponding series of position changes along the earth fixed axis as given by the receiver. The electronic output module generates a visual display of the roll, pitch, or heading of the aircraft by performing trigonometric functions on the vector.
    Type: Grant
    Filed: July 10, 1992
    Date of Patent: April 11, 1995
    Assignee: Unisys Corporation
    Inventors: LaMar K. Timothy, Douglas G. Bowen, Michael L. Ownby, John D. Timothy
  • Patent number: 5361344
    Abstract: An emulator enables a UNIX program to operate with a block mode terminal, even though the UNIX program is designed to operate with a character mode terminal. Initially, the emulator receives from the UNIX program, a UNIX output sequence of characters which produces a display on a video screen in the character mode terminal. Then the emulator converts the UNIX output sequence of characters into an input sequence of characters for the block mode terminal which there produces an emulated display and which protects the emulated display from operator alteration except for certain fields. Thereafter, the block mode terminal transmits a response character sequence which includes data characters written by an operator into the unprotected fields and no characters from the protected portions of the display.
    Type: Grant
    Filed: January 29, 1993
    Date of Patent: November 1, 1994
    Assignee: Unisys Corporation
    Inventors: Gregg B. Beardsley, Fredrick M. Wilhelmsen
  • Patent number: 5341564
    Abstract: An integrated circuit module having microscopic self-alignment features comprises: 1) an integrated circuit chip having a plurality of input/output pads in a pattern on a surface thereof; 2) an interconnect member having a surface which includes input/output pads in a pattern that matches the pattern of pads on the integrated circuit chip; and, 3) one of the surfaces has a predetermined number of holes of one-half to fifty mils deep and the other surface has a predetermined number of protrusions of one-half to fifty mils high which are shaped to fit into the holes and prevent the surfaces from sliding on each other when the input/output pads on both of the surfaces are aligned.
    Type: Grant
    Filed: May 10, 1993
    Date of Patent: August 30, 1994
    Assignee: Unisys Corporation
    Inventors: Mohammad Akhavain, Ken W. Economy
  • Patent number: 5323294
    Abstract: An integrated circuit package has an integrated circuit chip, a substrate which holds the chip, and a novel heat conduction mechanism which is coupled to the chip and which provides a path for conducting heat from the chip to a fluid medium. This heat conduction mechanism is characterized as including a) a compliant body, having microscopic voids throughout, which is disposed in and fills a gap in the heat conducting path, and b) a liquid metal alloy that is absorbed by and partially fills the microscopic voids of the compliant body. Due to the presence of the liquid metal alloy, the thermal conductivity through the body is high. Also, due to the voids in the body being only partially filled with the liquid metal alloy, the body can be compressed by dimensional variations within the integrated circuit package without squeezing out any of the liquid metal alloy that is held therein.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: June 21, 1994
    Assignee: Unisys Corporation
    Inventors: Wilbur T. Layton, Blanquita O. Morange, Angela M. Torres
  • Patent number: 5315534
    Abstract: A computer process interconnects logic circuit on an integrated circuit substrate by generating a single softwire statement for each interconnection, and by thereafter utilizing the softwire statements to generate multiple physical layouts for each interconnection. A "softwire statement" is a computer-generated statement which specifies and establishes a route for an interconnection from one terminal of a logic circuit to another terminal as a series of conductive segments which extend in certain directions between relative jog points that are referenced to blockages such as the logic circuits, on the substrate.
    Type: Grant
    Filed: June 25, 1991
    Date of Patent: May 24, 1994
    Assignee: Unisys Corporation
    Inventor: Eli S. Schlachet
  • Patent number: 5313552
    Abstract: A quantizer, which converts an input group of data samples into one of N quantized groups of data samples, does so by performing several dot products and compares. Each dot product is between the input group of data samples and a reference group of data samples u.sub.x, and each compare is with the dot product result and a constant k.sub.y. All of the reference groups of data samples and all of the constants are stored in a memory. This memory holds only N-1 constants and less then N/2 reference groups of data samples. A memory saving of several thousand percent is achieved by limiting the memory to hold no more then 2r reference groups of data samples where r is the number of samples in the input group, or no more then 2 log.sub.2 N reference groups of data samples.
    Type: Grant
    Filed: March 11, 1993
    Date of Patent: May 17, 1994
    Assignee: Unisys Corporation
    Inventor: Robert A. Lindsay
  • Patent number: 5311524
    Abstract: A fault tolerant three port communications module has two control ports for receiving commands from two computers, and a communications port for transferring data over a communications channel in response to the commands. Each control port includes a select line which carries a select signal with true and false states, mode lines which carry codes that represent the commands, and a write line which carries a respective pulse in sync with each of the codes. The select line, mode lines, and write line of each control port are coupled in the module to a respective inter-processor command decoder having a lead stage and a trail stage.
    Type: Grant
    Filed: August 27, 1992
    Date of Patent: May 10, 1994
    Assignee: Unisys Corporation
    Inventors: Lewis R. Carlson, John J. Carver, II
  • Patent number: 5311602
    Abstract: An image compressing circuit is comprised of: a number generating circuit which generates a respective number for each X-bit pixel in an input image such that the respective number changes in a cyclic fashion from pixel to pixel across each row of pixels in the input image; and, a translator circuit which performs a translation on each individual X-bit pixel together with its respective number to produce a corresponding Y-bit pixel, where Y is less than X. This translation is one which, when performed sequentially on several consecutive X-bit pixels of a single magnitude and their respective numbers for one cycle of the numbers, produces a series of Y-bit pixels of one or two magnitudes with an average value that increases monotonically as the single magnitude increases. By these Y-bit pixel series, the fidelity of the input image is retained even though Y is less then X.
    Type: Grant
    Filed: February 25, 1992
    Date of Patent: May 10, 1994
    Assignee: Unisys Corporation
    Inventors: Donald J. Nieglos, Daniel A. Neuss
  • Patent number: 5307239
    Abstract: An electro-mechanical module comprises a packaged electrical part having a surface which dissipates heat, and a springy frame which overlies that surface. This frame includes a pair of fasteners for catching on the package at two predetermined locations, and the frame has an unstressed state in which the fasteners do not coincide with the two locations. However, the frame is springy enough to be stressed and thereby move the fasteners to the two locations, and thereafter return back towards the unstressed state and catch the fasteners on the package at the two locations. To complete the module, a heat sink rests on the surface and is removably attached to the frame.
    Type: Grant
    Filed: October 8, 1992
    Date of Patent: April 26, 1994
    Assignee: Unisys Corporation
    Inventors: Paul McCarty, Jerry I. Tustaniwskyj, Jon L. Zimmerman
  • Patent number: 5303260
    Abstract: The present invention applies in a communication system where - a) two vehicles V.sub.A and V.sub.B transmit data to each other intermittently, b) data transmitted from V.sub.A to V.sub.B is modulated in V.sub.A by a PN code PN.sub.1 having a time varying phase .phi..sub.MA and is correlated in V.sub.B by the code PN.sub.1 having a different time varying phase .phi..sub.CB, and c) data transmitted from V.sub.B to V.sub.A is modulated in V.sub.B by a PN code PN.sub.2 having a time varying phase .phi..sub.MB and is correlated in V.sub.A by the code PN.sub.2 having a different time varying phase .phi..sub.CA. With the present invention, the codes PN.sub.1 and PN.sub.2 can have respective nominal frequencies f.sub.1 =1/T.sub.1 and f.sub.2 =1/T.sub.2 that drift in at least one of the vehicles. This drift, is then compensated for by the present invention by sensing, during the data transmissions, the phase shifts .DELTA..phi..sub.MA, .DELTA..phi..sub.MB and .DELTA..phi..sub.
    Type: Grant
    Filed: January 6, 1993
    Date of Patent: April 12, 1994
    Assignee: Unisys Corporation
    Inventors: Dale D. Fonnesbeck, Vaughn L. Mower