Abstract: The present invention overcomes disadvantages including the occurrence of uneven printing, the need to provide a large-sized power supply, high cost and the deterioration of energy conversion efficiency resulting from the application of high current to the common resistance of a line head in a thermal printer for printing an image by the line head. Specifically, a gradation generating means (14) for generating gradation data; a selection means (15) for alternatively selecting each image data the number of which corresponds to the number of head elements of a head, and data of value 0 for the respective image data, and for switching selection as to which data is to be selected, the image data or the data of value 0, every time a value of the gradation data changes; and a comparison means (16) for feeding signals each indicating a comparison result of comparing the data selected by the selection means (15) with the gradation data, are provided at a line head controller (7) of a thermal printer.

Abstract: A method of Multi-slot Averaged Linear Interpolation (MALI) to estimate channel transfer characteristics at a receiver in a wireless network. The method and system are particularly well suited to use in wideband CDMA transmission systems. The steps of the method include calculating an instantaneous channel estimation from each slot in a transmitted signal, combining the instantaneous channel estimations for adjacent slot groups, and linearly interpolating between multi-slot averages to provide each symbol within a slot an accurate estimate of transfer characteristics for that symbol.

Abstract: A system and method for connecting computer workstations in clusters to perform parallel-distributed processing with respect to compute-intensive applications are provided. Commodity computers/workstations and commodity network hardware are arranged to form unique-architecture building blocks (clusters) which may then act as supernodes in larger scale cluster systems. An integrated ROCC+ (Reduced Overhead Cluster Communication) message passing software system provides unique communication logic for efficient implementation of collective message passing operations between each node and supernode. According to a preferred embodiment, each building block comprises two ethernet segments and four nodes (e.g., workstations), two of which are connected by Network Interface Cards (NICs) to both segments with the remaining nodes each connected to a respective one of the segments.

Abstract: A microprocessor comprises a defined execution unit coupled to internal buses of the processor for execution of a predefined, fixed set of instructions, combined with one or more programmable execution units coupled to the internal buses for execution of a set of program instructions, to provide an on chip reprogrammable instruction set accelerator RISA. Reprogrammable execution units may be made using field programmable gate array technology having configuration stores. Techniques for translating a computer program into executable code relying on the RISA involve providing a library of defined and programmed instructions, and compiling a program using the library to produce an executable version of the program using both defined and programmed instructions. The executable version can be optimized to conserve configuration resources for the programmable execution unit, or to optimize speed of execution.