Abstract: This invention relates to personal computers having the capability for the usual system controlling processor to be reset, initialized and then isolated if an alternate system controller is provided for the system. In accordance with this invention, a personal computer system has a high speed local processor data bus; an input/output data bus; a microprocessor coupled directly to the local processor bus; a connector coupled directly to the local processor bus for accommodating reception of an alternate system controller; and a bus interface controller coupled directly to the local processor bus and directly to the input/output data bus for providing communications between the local processor bus and the input/output data bus. Provision is made for setting a status bit to identify to software such as diagnostic software which microprocessor is functioning as the system controlling processor.

Abstract: A CD-ROM drive unit includes a disk transport tray moved between an open position, in which a compact disk, exposed outside the drive unit, can be removed and replaced, and a closed position, in which data can be read. The drive unit also includes a disk reading mechanism, which rotates the disk, and which moves an optical sensor along the disk as required for reading information from the disk. Motions obtained from this disk reading mechanism are used to drive the disk transport tray between the positions. In a first version of the device, a spindle motor drives a spindle, on which a disk is placed, in a forward direction to effect reading data and in a reverse direction to effect movement of the disk transport tray. A one-way clutch is used to discriminate between driver directions, only operating a mechanism to move the tray when the spindle motor is driving in reverse.

Abstract: In a personal computing system the function of the DMA controllers in the "AT" or "ISA" bus has been modified so that the system may select whether the 16-bit DMA channels are to be used as 8-bit DMA channels or 16-bit DMA channels. An 8/16-bit mode bit for each of the 16-bit DMA channels is written in a control register during the system Power On Self Test routine. Once the mode bit is written for each of the three 16-bit DMA channels, it may be read when the channel is active to select whether the channel is to operate as an 8-bit or 16-bit channel. With this mode bit information available, the page addressing may be selectively changed from 128k size pages to 64k size pages when a 16-bit DMA channel is to be converted to 8-bit. In addition, the byte addressing within a page may be changed from two byte addressing during 16-bit mode to single byte addressing during 8-bit mode.