Abstract: Various neural-network based surrogate model construction methods are disclosed herein, along with various applications of such models. Designed for use when only a sparse amount of data is available (a “sparse data condition”), some embodiments of the disclosed systems and methods: create a pool of neural networks trained on a first portion of a sparse data set; generate for each of various multi-objective functions a set of neural network ensembles that minimize the multi-objective function; select a local ensemble from each set of ensembles based on data not included in said first portion of said sparse data set; and combine a subset of the local ensembles to form a global ensemble. This approach enables usage of larger candidate pools, multi-stage validation, and a comprehensive performance measure that provides more robust predictions in the voids of parameter space.

Abstract: Accordingly, an improved pumping system is herein disclosed. In one embodiment, the pumping system includes a subsurface pump, a tubing string, and a surface pumping unit. The subsurface pump is anchored downhole and driven by repeated upward and downward motion of the tubing string. The subsurface pump pumps fluids to the surface via the tubing string. The upward and downward motion of the tubing string is imparted by any suitable surface pumping unit such as, e.g. a beam pumping unit or a hydraulic pumping unit. This pumping system advantageously provides for a minimal number of strings downhole, requiring at most only (1) casing and (2) the production tubing. Accordingly, the well may be drilled using a very slender hole, thereby allowing for sharply reduced drilling and production costs.

Abstract: A secure system and method is provided for remotely waking a computer from a power down state. In one embodiment, a network interface card receives incoming data packets via a network connector. A control module is coupled to the network connector and is configured to search the incoming packets for a wake-up pattern. The control module also verifies that the packet's destination address matches the destination address of the network interface card. If the destination addresses match and a wake-up pattern is found, the control module decrypts an encrypted value from the incoming packet and compares the result to an expected value. A successful comparison causes the control module to assert a signal to wake up the host computer. Preferably, a standard public/private key pair encryption scheme is used, and the source of the data packet encrypts the expected value with a private key.

Abstract: A measurement device is provided that determines fluid properties from vibration frequencies of a sample cavity and a reference cavity. In one embodiment, the measurement device includes a sample flow tube, a reference flow tube, vibration sources and detectors mounted on the tubes, and a measurement module. The sample flow tube receives a flow of sample fluid for characterization. The reference flow tube is filled with a reference fluid having well-characterized properties. The measurement module employs the vibration sources to generate vibrations in both tubes. The measurement module combines the signals from the vibration detectors on the tubes to determine properties of the sample fluid, such as density, viscosity, compressibility, water fraction, and bubble size. The measurement module may further detect certain flow patterns such as slug flow, for example.

Abstract: A computer system is provided with a dynamically reconfigurable boot order. In one embodiment, the computer comprises a user input device, a nonvolatile memory, a network interface, a boot trigger, and a CPU. The CPU is coupled to the user input device to detect a predetermined key press, coupled to the boot trigger to detect the assertion of a system reset signal, and coupled to the nonvolatile memory to retrieve a system BIOS in response to assertion of the system reset signal. The CPU executes the BIOS to initialize the computer system, and as part of the system initialization, the CPU determines a first target boot-up device. Preferably if the predetermined key has been pressed during the system initialization, the CPU alters the default boot order to select the network interface as the first target boot up device. The network interface is configurable to retrieve an operating system from a network device for the CPU to execute.

Abstract: A computer system is provided with a dynamically reconfigurable boot order. In one embodiment, the computer comprises a network interface, a nonvolatile memory, and a CPU. The network interface may be coupled to a network to receive a “wake-up” data packet, that is, a data packet that includes a predetermined data pattern for which the network interface can be configured to scan. Upon detecting the wake-up data packet, the network interface can initiate a computer boot-up sequence. The CPU begins a boot-up sequence by retrieving a BIOS from the nonvolatile memory. One portion of the boot-up sequence specified by the BIOS includes determining and accessing a series of target boot devices to locate and retrieve an operating system. Preferably, the order of the series of target boot devices (i.e. the “boot order”) is different from a default boot order if the network interface initiated the current boot-up sequence. Otherwise, the default boot order is used.

Abstract: A computer system includes a processor, a memory device, at least one expansion bus, and a bridge device coupling the processor, memory device, and expansion bus together. The bridge device preferably includes a memory controller that is capable of arbitrating among pending memory requests, and in certain situations, completing the current cycle after the next cycle begins. This allows executing at least two memory requests concurrently, thus improving bus utilization and retrieving and storing data in memory occurs more efficiently. The memory controller can complete the current memory cycle during the next cycle when the next memory request to be executed will result in a bank miss and a least recently used tracker is currently tracking its maximum number of open memory pages and banks.

Abstract: A computer system is provided with a multifunction power switch. In addition to the normal function of turning the computer on and off, the power switch has the additional function of clearing CMOS memory. In one embodiment, pressing the power switch while the computer is connected to a power source turns the computer on and off, and when the computer is disconnected from the power source, the CMOS memory may be cleared by pressing and holding the power switch for a predetermined time delay, e.g. 10 seconds. As a precaution against malicious clearing of CMOS memory, activation of this feature may be disabled as long as the computer cover is closed. In this case, the computer cover would have to be at least partially removed before the power button is pressed and held to clear CMOS. An LED may be provided which illuminates to indicate the success of the CMOS clearing operation.