Abstract: A method and associated apparatus for using a primary FIFO and one or more secondary FIFOs in parallel to simplify flow control and routing in packet communication operations wherein at least one FIFO (buffer) is associated with each of a plurality of receiving nodes or components within a receiving node. The present invention applies received packets simultaneously to a primary FIFO and to all associated secondary FIFOs in the receiver of a packet communications link. After receipt of a packet, the packet is removed from any secondary FIFOs which correspond to receiver nodes or components to which the packet was not routed. For all receiving nodes or components to which the packet was routed, if the packet was stored in each associated secondary FIFO without overflow, then the packet is also purged from the primary FIFO.

Abstract: Methods and associated data structures operable in a RAID subsystem to improve I/O performance. A two level cache data structure and associated methods are implemented with a RAID controller. The lower level cache comprises buffers holding recently utilized blocks of the disk devices. The upper level cache records which blocks are present in the lower level cache for each stripe in the RAID level 5 configuration. The upper level cache serves to reduce the overhead processing required of the RAID controller to determine which blocks are present in the lower level cache. Having more rapid access to this information by lowering the processing overhead enables the present invention to rapidly select between different write techniques to post data and error blocks from low level cache to the disk array. A RMW write technique is used to post data and error checking blocks to disk when insufficient information reside in the lower level cache.

Abstract: A method and corresponding controller apparatus for creating, updating and maintaining mapping information in a virtual mass storage subsystem. A request to manipulate a virtual block or cluster identifies a particular virtual block number. The virtual block number is mapped to a first physical block number by a direct calculation. A header data structure contained in the first physical block contains mapping information to locate other physical blocks associated with the virtual cluster. In addition to the header data structure, the first physical block contains a portion of the stored data for the corresponding virtual cluster. Additional physical blocks which stored the data of the virtual cluster are located from the mapping information in the header of the first physical block. The methods of the present invention provide improved performance and reduced buffer memory requirements in the virtual mass storage controller circuits of the subsystem as compared to prior approaches.

Abstract: A method and associated apparatus for automating the filtration and generation of information in a packetized communication system. A filtration table includes entries used in recognizing a valid packet received at a node in a communication system. A mask field in each entry is applied to appropriate fields in the packet (e.g. the ordered set as applied to Fibre Channel communication systems) to determine the validity of the packet with regard to the receiving node. Rules in a field of each entry further qualify the recognition of a received packet (e.g. ordered set) by testing the reception of the packet against other logical rules. Action fields in each record permit definition of actions to be invoked automatically (e.g. automatic adjustment of fill transmissions in Fibre Channel applications) in response to receipt and recognition of a particular packet. The set of packets recognized by the receiving node may be modified by adding, deleting, or modifying the entries in the filtration table.

Abstract: Method for implementing a stripe write operation in a RAID device having XOR command set enabled disk drives on a common interface bus. The method of the present invention improves upon prior designs which do not use the XOR command set by eliminating the need for the RAID controller to include XOR (parity) generation computational elements. Further, the method of the present invention improves upon the stripe write method suggested by the XOR command set specifications in which a stripe is performed by a series of xdwrite XOR command operations issued to the data drives of the RAID array. Rather, the method of the present invention performs parallel standard writes of the data portions of the stripe write, then issues a rebuild XOR command to the parity disk drive to rapidly regenerate the parity blocks in the stripe just written. The method of the present invention reduces the worst case rotational latency delay of the stripe write operation to two rotational latency periods.

Abstract: A circuit for charging a battery comprising a charging source, a transistor and a charge control device for switching the transistor. When saturated and switched on, the transistor permits flow of charge to the battery from the charging source. The charge control device senses when main power is lost and switches the transistor off to prevent discharge of the battery through the charging source. After the battery is charged the transistor provides a path of least resistance to bleed off unwanted charge from other sources thereby preventing overcharging of the battery. The circuit therefore charges a battery rapidly and prevents overcharging of the battery. The charge control device is operable from a constant supply voltage supplied by a main power source when available or from the charged battery to continue operation despite loss of main power.

Abstract: Apparatus and associated methods for improving I/O performance in a computing system which includes one or more MPUs and one or more IOPs. I/O requests are queued by a requesting MPU in a memory shared with one or more IOPs. Each IOP is associated with a queue. Each IOP may continue processing queued I/O requests after completing processing on an earlier request. In addition, each MPU is associated with a queue shared with the IOPs. When an IOP completes processing of an I/O request, a completion message is added to the requesting MPU's queue and an interrupt is generated for that MPU. The MPU services all completion messages in its queue when the interrupt is processed. A threshold value is associated with each MPU queue. The threshold value indicates the minimum number of completed I/O requests required before an interrupt request is generated to the MPU.

Abstract: In a typical storage medium, such as a magnetic hard disk, there is a file allocation table (FAT) stored thereon which is referenced each time the medium is accessed. Many data processing mechanisms rely on the existence of this FAT for accessing the medium. However, some storage media, such as CD-ROM's, do not have FAT's stored thereon. In order to properly interface FAT reliant data processing mechanisms with storage media having no FAT, file storage information is first obtained from the storage medium. Then, using this file storage information, a FAT having a format compatible with the data processing mechanisms is generated. Information from the FAT is provided to the mechanisms and, using this FAT information, the mechanisms can access information on the storage medium. Thus, even though the storage medium has no FAT, it is still accessible by FAT reliant data processing mechanisms.

Abstract: A method and associated apparatus within a storage library subsystem for utilizing a single light source in combination with a single reflectivity sensor for multiple functions within the storage library subsystem. A laser light source and reflectivity sensor are mounted adjacent one another on the moveable robotic gripper hand internal to the storage library subsystem. The multiple sensing methods and apparatus of the present invention include use of the apparatus for calibrating the robotic positioning mechanisms to permit more tolerance for manufacturing variability, use of the apparatus to sense presence or absence of a magazine or cartridge within the library, and use of the apparatus for reading and decoding barcoded labels on the face of cartridges within the library. Use of a single, simple apparatus for these multiple purposes and functions permit reduction in the complexity of the library subsystem and therefore a reduction in the associated costs.

Abstract: A method whereby a host computer system is informed of the drive status in a disk array when one or more of the disk drives fail. A data pattern (timestamp or status code) is written on each of the disk drives in service in the array when an event occurs which changes the operating state of an array. The state of an array changes only when the array is configured, unconfigured, a disk drive fails, parity is marked inconsistent or the array is restored. The timestamp includes a binary number to allow the system to determine the status of each disk drive in the array. At each state, the timestamp on each of the operating disk drives is updated to reflect the number of operating disk drives and the status of the parity data. The distinct binary numbers that result when the array changes states allow the system to maintain the data integrity of the array.

Abstract: A high performance scaleable hardware architecture for a disk array storage subsystem which supports RAID modes 0, 3, 4 and 5. The architecture features a high bandwidth parity calculation engine, a buffered PCI interface operating at the full speed of the PCI bus, and a dedicated local memory. The dedicated local memory is dual ported so that PCI and parity operations may operate concurrently. The architecture of the disk array controller allows parity calculations and memory block moves to occur without interfering with the controller processor or its associated memory, freeing the controller processor to manage array task control. The array controller configuration allows simultaneous operation of data block moves between storage I/O devices and local memory; data block moves between host SCSI connections and local memory; parity calculations; and normal CPU memory fetches, queued operations for block moves and queued operations for parity tasks.

Abstract: A method and associated apparatus within a storage library subsystem for simply adapting the motion of a robotic mechanism for moving media cartridges to allow for mechanical misalignments. When retracting a cartridge from a slot in the library subsystem, the present invention monitors a sensor in the gripper hand to verify that the cartridge is not being pulled from the gripper due to "snagging" caused by mechanical misalignment of the had with the slot. When a snag is sensed, the methods and apparatus of the present invention stop the motion, initiate robotic actions to regroup the cartridge securely, and retry the retraction with adjustments to the robotic movements and positions to avoid the snag. When inserting a cartridge into a slot in the library subsystem, the present invention monitors the progress of the servo motor controlling the robot to determine whether the motion is blocked due to mechanical misalignment of the robotic mechanism with the slot.

Abstract: In an electronic IC package, an I/O PAD circuit design which protects 3 Volt optimized I/O functional circuits from damage due to the application of external 5 Volt signals to the I/O PAD both while the functional circuit design is powered on and powered off. When the I/O circuits associated with the I/O PAD are powered on, the present invention protects the I/O circuits by applying well known designs. However, when the I/O circuits associated with the I/O PAD are powered off, the present invention draws power from the external 5 Volt signal to activate additional transistors to protect the powered off I/O circuits.