Patents Represented by Attorney David F. Zinger
  • Patent number: 5726991
    Abstract: A data communication method and apparatus includes an integral bit error rate test system. The system is adapted to receive digital data signals to be transmitted over a communication link and includes a transmitter for transmitting the data signals onto the link. A test signal pattern generator generates a determinable pattern of digital bit test signals which are insertable into an input of the transmitter in place of the digital data signals. A receiver is coupled to the link for receiving the bit test signals and for comparing the received pattern of the bit test signals to the determinable pattern. The bit error rate is computed from the number of bit differences between the transmitted test signals and the determinable pattern.
    Type: Grant
    Filed: October 20, 1995
    Date of Patent: March 10, 1998
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventors: Dao-Long Chen, Robert D. Waldron, Khanh C. Nguyen
  • Patent number: 5625405
    Abstract: A Video-On-Demand (VOD) system including a plurality of video storage devices; an asynchronous transfer mode (ATM) telephony technology network connected to provide video data to a plurality of subscribers; and a unique video server coordinating the conversion and transfer of video data from computer technology devices to the ATM telephony technology network.
    Type: Grant
    Filed: February 20, 1996
    Date of Patent: April 29, 1997
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventors: Keith B. DuLac, T. M. Ravi
  • Patent number: 5598549
    Abstract: A scalable software architecture, for optimal performance on a RAID level 1, 3, 4 and 5 disk array or tape array. The software architecture consists of a software device driver and one or more driver daemon processes to control I/O requests to the arrays. Implemented in a UNIX or NetWare operating environment, this architecture provides a transparent interface to the kernels I/O subsystem, physical device drivers and system applications. The array driver and I/O daemon can be run on a uni-processor or multi-processor system platform to optimize job control, error recovery, data recreation, parity generation and asynchronous writes.
    Type: Grant
    Filed: June 11, 1993
    Date of Patent: January 28, 1997
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventor: Dale F. Rathunde
  • Patent number: 5581788
    Abstract: A system and method for testing the functionality of a VGA card and associated monitor. A testing and set up tool or Program is installed in a computer having an operating system. The Program provides a list of modes and timings for a plurality of monitors including the monitor being tested as part of the computer. A user of the Program selects various modes and timings to be tried. Looking at the screen of the monitor enables the user to determine which combinations of modes and timings, for example, are successful. A list is maintained for the modes and timings that prove successful or compatible. The list for compatible combinations is passed to the driver associated with the operating system of the computer. In a DOS environment, for example, the list of compatible combinations is used by the Program to write a Command Line that is used for setting up the associated CONFIG.SYS.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: December 3, 1996
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventor: Daniel E. Ballare
  • Patent number: 5577213
    Abstract: A method and apparatus for producing an electronic circuit which allows a device to be connected to a bus, such as a system bus in a computer. The invention accepts user specified parameters for configuring a device adapter which interfaces the device to the bus, and thereafter generates a customized device adapter based on such user specified parameters. By using a common design macro, which is programmable, a user can easily specify and generate custom device adapters for a plurality of dissimilar devices to be connected to the bus. A resulting adapter architecture allows for multiple, dissimilar devices to interface to a computer bus with a single device adapter integrated circuit or card.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: November 19, 1996
    Assignees: AT&T Global Information Solutions Company, Hyundai Electronics America, Symbios Logic Inc.
    Inventors: James M. Avery, William D. Isenberg