Patents Represented by Attorney David L. Adour
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Patent number: 7106695Abstract: A method of bandwidth management over a transmission network comprising a plurality of stations forming a logical ring that circulates a token from station to station. Each station is allowed to transmit data to other stations over the transmission network when it receives the token. The station is allowed to transmit C bytes, where C is a credit. The credit increases in proportion to the time spent since the preceding reception of the token by the station.Type: GrantFiled: May 28, 2002Date of Patent: September 12, 2006Assignee: International Business Machines CorporationInventors: Lionel Denecheau, Denis Esteve, Patrick Sicsic
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Patent number: 6487461Abstract: A method for aligning a plurality of thin film transistor tiles for constructing a flat panel display. A coverplate is arranged on a coverplate support. A first layer of a bonding material is applied to at least one of a first side of each of the tiles and a surface of the coverplate on which the tiles are to be secured. The tiles are arranged on the coverplate, such that the first layer of bonding material is arranged between the tiles and the coverplate. The tiles are connected to an alignment apparatus. The tiles are aligned relative to each other and the coverplate. The tiles are at least partially secured to the coverplate.Type: GrantFiled: June 9, 2000Date of Patent: November 26, 2002Assignee: International Business Machines CorporationInventors: Michael A. Gaynes, Allan O. Johnson, Ramesh R. Kodnani, Mark V. Pierson, Edward J. Tasillo
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Patent number: 5922063Abstract: A method and apparatus for reducing the software overhead of message passing in parallel systems. Special purpose hardware assists in constructing each data message sent through a network. Message passing systems generally require that every message be prefixed with a message header describing the key control parameters of the message. The software task is to construct the message header for every message individually and to transmit the header prefixed to every message. The software is relieved of constructing the message header and uses special purpose hardware to accomplish the job more efficiently.Type: GrantFiled: September 17, 1992Date of Patent: July 13, 1999Assignee: International Business Machines CorporationInventors: Howard Thomas Olnowich, Michael Wayland Dotson, James William Feeney, Robert Francis Lusch, Michael Anthony Maniguet
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Patent number: 5239289Abstract: A compact, wide range inductor capable of being trimmed to a desired frequency value, comprising at least two individually tunable inductive elements of different resolution, disposed upon an insulative support. The inductor is usually placed within a hybrid circuit and trimmed after component population.Type: GrantFiled: September 4, 1991Date of Patent: August 24, 1993Assignee: International Business Machines CorporationInventors: Frank D. Ferraiolo, David P. Pagnani, Peter R. Tomaszewski
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Patent number: 5050296Abstract: A method for affixing pins to a ceramic substrate substantially eliminating cracking of the substrate by pre-bulging the pin blanks and, then after inserting the pin blanks into the substrate, a clearance is provided between the lower pin holding die and the lower face of the substrate for the subsequent head forming operation on the opposite face of the substrate.Type: GrantFiled: June 7, 1990Date of Patent: September 24, 1991Assignee: International Business Machines CorporationInventors: Alan J. Emerick, Eugene L. Marsh, Thomas L. Miller, Jerzy M. Zalesinski
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Patent number: 5022956Abstract: Viaholes are dry-etched into glass fiber reinforced plastic sheets according to a predetermined hole pattern, leaving the glass fiber meshing practically unaffected.The method is used, for instance, to fabricate plastic sheets with unilaterally or bilaterally applied conductor patterns and viaconnectors that are conductively linked to the conductor patterns, and to fabricate multilayer board laminates obtained by several plastic sheets carrying the conductor pattern being alternately packaged, if required, with untreated copper sheets, and by the package thus obtained being subsequently laminated. Such boards and/or plastic sheets bilaterally provided with conductor patterns may be used as connector boards for, say, multilayer ceramic modules carrying semiconductor chips.Type: GrantFiled: June 10, 1985Date of Patent: June 11, 1991Assignee: International Business Machines CorporationInventors: Werner Cziep, Ulrich Kuenzel, Wolf-Dieter Ruh
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Patent number: 4927477Abstract: A method for making flush circuit laminates for use in constructing a multilayer circuit board is disclosed. The method comprises laminating together a dielectric sheet(s) of material, such as glass cloth impregnated with epoxy resin, placed between predrilled or pre-punched sheets of a conductive material, such as copper, to form the desired flush circuit laminate, such as a flush surface power core, which, in turn, may be used with other laminates to construct the desired multilayer circuit board. This method allows thinner laminates to be made with acceptable dimensional tolerances which provides improved impedance characteristics compared to laminates made using conventional processes. Thus, the method provide a method of making a more compact, higher speed multilayer circuit board without sacrificing circuit density on the circuit board. If desired, the method may be carried out using all dry processes.Type: GrantFiled: April 15, 1988Date of Patent: May 22, 1990Assignee: International Business Machines CorporationInventor: Theron L. Ellis
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Patent number: 4885074Abstract: A reactor for generating a uniform field of energized gas for plasma processing. The reactor chamber is capable of sustaining a vacuum. A mechanism for mounting a workpiece is disposed within the reactor chamber so that a workpiece can be exposed to energized gas. A first electrode in the chamber is positioned in operative relationship to the workpiece mounting mechanism and a second electrode within the reactor is positioned to at least partially surround the first electrode.Type: GrantFiled: April 26, 1989Date of Patent: December 5, 1989Assignee: International Business Machines CorporationInventors: Robin A. Susko, James W. Wilson
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Patent number: 4873123Abstract: A flexible electrical connection, and method for making such a connection, for mounting an electronic device, such as a semiconductor chip made primarily of silicon, on an organic substrate, such as a printed circuit board made of a glass material impregnated with epoxy resin, are disclosed. The flexible electrical connection comprises a circuit line attached to the surface of the organic substrate and having a floating terminus in a relatively low adhesive area of the organic substrate where it is desired to mount the electronic device on the organic substrate. The floating terminus includes a stress relief bend, and the flexible electrical connection relieves stresses, such as thermal stresses, which may otherwise damage the physical and/or electrical connection between the electronic device and the floating terminus of the flexible electrical connection when the electronic device is mounted on the surface of the organic substrate.Type: GrantFiled: September 29, 1987Date of Patent: October 10, 1989Assignee: International Business Machines CorporationInventors: Michael J. Canestaro, William J. Summa
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Patent number: 4857383Abstract: A method of improving the adhesion between a synthetic substrate and metallized layers deposited thereon. A glass resin layer is spin-coated onto an epoxide substrate. The glass layer is covered by a photoresist layer which is roughened by reactive ion etching. The roughened contour of the photoresist layer is transferred via reactive ion etching to form a perforation pattern in the glass layer. The substrate is then etched vertically and horizontally to produce recesses in the substrate having overhanging walls. A thin copper layer is sputtered onto the substrate and copper conductors are sputtered onto the thin copper layer, the copper layers filling the recesses. The recesses and overhangs form mortices in the substrate, and the copper layers within the recess form tenons which fittingly engage with the mortices to produce adhesion between the substrate and the metallized layers in the order of 1000 n/m.Type: GrantFiled: November 9, 1987Date of Patent: August 15, 1989Assignee: International Business Machines CorporationInventors: Johann Greschner, Friedrich W. Schwerdt, Hans J. Trumpp
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Patent number: 4830706Abstract: Sloped vias are formed in a resinous layer made from a material which is curable in stages, which can be coated on a substrate prior to partial curing, which adheres to the substrate and which shrinks upon full curing by a process which includes first using a dry, directional etch to form straight walled vias in a partially cured layer of the material coated on the substrate and then fully curing the layer. The straight walled vias are changed to sloped vias during final cure when adhesive contact between the substrate and the layer of resinous material inhibits shrinking of the side of the resinous layer which contacts the substrate, while the unsupported side of the layer is free to shrink. Such sloped vias are observed to improve the integrity of conductive coatings placed in the vias by reducing cracking, peeling and flaking thereof. Sloped vias with conductive coatings are useful in the construction of computer components.Type: GrantFiled: October 6, 1986Date of Patent: May 16, 1989Assignee: International Business Machines CorporationInventors: Ronald S. Horwath, John R. Susko, Robin A. Susko
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Patent number: 4788767Abstract: A method and apparatus are disclosed for mounting a flexible film semiconductor chip carrier on a second level electronic package, such that the flexible film of the carrier is supported substantially in a plane above the surface of the second level electronic package. The method comprises positioning preformed spacers embedded in a dissolvable polysulfone foam holder between the outer lead bonding pads on the flexible film semiconductor chip carrier and corresponding (matching) bonding pads on the second level electronic package. Each of the preformed spacers may comprise, for example, a solder cylinder with a copper core. The preformed spacers may be bonded to the outer lead bonding pads on the chip carrier, and to the matching bonding pads on the second level electronic package, by reflowing the solder of the spacers using, for example, a conventional solder reflow oven.Type: GrantFiled: March 11, 1987Date of Patent: December 6, 1988Assignee: International Business Machines CorporationInventors: Kishor V. Desai, Kohn Harold
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Patent number: 4766670Abstract: An electronic packaging structure, and a method of making this structure, are disclosed. The electronic packaging structure comprises a full panel, circuitized flexible film semiconductor chip carrier mounted on a circuitized substrate such as a printed circuit board. A plurality of semiconductor chips are mounted on the carrier in a selected pattern, and the carrier, with the chips, is mounted on a matching pattern of bonding sites on the circuitized substrate. Preferably, the circuitized flexible film semiconductor chip carrier is manufactured on a support structure used to facilitate handling of the circuitized flexible film and to facilitate heat transfer from the semiconductor chips mounted on a carrier to a heat sink which is part of the circuitized substrate. Also, the semiconductor chip mounted on the flexible film chip carrier may be tested, and burned in, while on the support structure before the chip carrier, with the chips, is mounted on the circuitized substrate.Type: GrantFiled: February 2, 1987Date of Patent: August 30, 1988Assignee: International Business Machines CorporationInventors: Charles E. Gazdik, Donald G. McBride, Donald P. Seraphim, Patrick A. Toole
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Patent number: 4744008Abstract: An electronic packaging structure includes a second level electronic package having at least one opening formed therein and circuitry for electrical connection to a semiconductor chip. A circuitized polyimide film chip carrier includes at least one semiconductor chip mounted on one major surface thereof and at least one decoupling capacitor mounted on an opposite surface thereof. The decoupling capacitor is electrically coupled to input/output contacts of the semiconductor chip. The carrier is then mounted on the second level electronic package so that one semiconductor chip is positioned within a respective opening and the circuitry formed on the carrier is coupled to the circuitry formed on the second level package thereby interconnecting the semiconductor chip to the electronic package.Type: GrantFiled: September 11, 1987Date of Patent: May 10, 1988Assignee: International Business Machines CorporationInventors: Vincent J. Black, Ronald S. Charsky, Leonard T. Olson
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Patent number: 4728751Abstract: A flexible electrical connection, and method for making such a connection, for mounting an electronic device, such as a semiconductor chip made primarily of silicon, on an organic substrate, such as a printed circuit board made of a glass material impregnated with epoxy resin, are disclosed. The flexible electrical connection comprises a circuit line attached to the surface of the organic substrate and having a floating terminus in a relatively low adhesive area of the organic substrate where it is desired to mount the electronic device on the organic substrate. The floating terminus includes a stress relief bend, and the flexible electrical connection relieves stresses, such as thermal stresses, which may otherwise damage the physical and/or electrical connection between the electronic device and the floating terminus of the flexible electrical connection when the electronic device is mounted on the surface of the organic substrate.Type: GrantFiled: October 6, 1986Date of Patent: March 1, 1988Assignee: International Business Machines CorporationInventors: Michael J. Canestaro, William J. Summa
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Patent number: 4681654Abstract: A method is disclosed for making circuitized, flexible film substrates in a continuous tape format using a transfer technique. The tape is made with window-like openings having a relatively thin layer of polyimide spanning the openings. The relatively thin layer of polyimide is transferred to the tape from a metal carrier foil, preferably by using a special adhesive system. After the polyimide is transferred to the tape, the polyimide spanning the window-like openings in the tape is circuitized to form individual, circuitized, flexible film substrates which may be handled in the tape format for further processing. Preferably, the tape includes perforations for engaging sprockets of automated manufacturing equipment, or the like.Type: GrantFiled: May 21, 1986Date of Patent: July 21, 1987Assignee: International Business Machines CorporationInventors: Robert J. Clementi, Charles E. Gazdik, William Lafer, Roy L. Lovesky, Donald G. McBride, Joel V. Munson, Eugene P. Skarvinko
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Patent number: 4602733Abstract: Apparatus for the selective removal of the solder and a connector soldered in the through hole of a circuit panel including means for heating the solder and a pair of aligned tubes placed against opposite surfaces of the panel surrounding the connecting through hole with the tubes being supplied with fluid under pressure so as to produce a pressure differential across the solder column in the through hole and effective to urge the connector and solder from the through hole into the low pressure tube when the solder is melted.Type: GrantFiled: January 11, 1985Date of Patent: July 29, 1986Assignee: International Business Machines CorporationInventors: John R. Slack, William D. von Voss
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Patent number: 4596037Abstract: Apparatus for determining the location of a physical feature, such as a hole in a panel, relative to two coordinate axes by optically scanning across the panel and hole from a reference while measuring the distance of the hole from the reference and the length of the hole chord for each of a plurality of scans, then adding half the chord length to the respective distance to the hole edge and averaging the results for the plurality of scans. Scan lines used for the hole edge and chord measurement can be selected from among a plurality of scan lines having a predetermined chord length. The measuring apparatus can also be readily adjusted to accommodate a range of feature dimensions.Type: GrantFiled: March 9, 1984Date of Patent: June 17, 1986Assignee: International Business Machines CorporationInventors: Donald R. Bouchard, John L. Danton, Kevin A. Dawson, David J. Sloma
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Patent number: 4579772Abstract: Woven glass cloth and method of its manufacture suitable for use as a resin-impregnated substrate for printed circuits in which the major dimension or transverse axis of the elliptical warp yarns exceeds a predetermined fraction of that dimension of the fill yarns of the woven cloth. Multi-filament warp yarns are typically subjected to tensile stress during weaving and firing such that the yarn compaction prevents the thorough impregnation by a resin. The result is that voids are maintained along the innermost filaments of the yarn. These voids, when filled with materials other than resin, such as plating solution, ultimately produce circuit failures.Type: GrantFiled: December 19, 1983Date of Patent: April 1, 1986Assignee: International Business Machines CorporationInventors: Anilkumar C. Bhatt, Michael J. Cibulsky, Donald E. Doran, Lawrence J. Hugaboom, James W. Knight
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Patent number: 4563385Abstract: Woven glass fiber cloth for printed circuit substrates in which the warp is of plied yarn and the fill is of unplied or twisted yarn to facilitate more thorough polymeric resin impregnation and achieve improved dimensional stability.Type: GrantFiled: June 20, 1984Date of Patent: January 7, 1986Assignee: International Business Machines CorporationInventors: Anilkumar C. Bhatt, Donald E. Doran, James W. Knight