Abstract: Explosive forces are used to fill interconnect material into trenches, via holes and other openings in semiconductor products. The interconnect material may be formed of metal. The metal may be heated prior to the force filling step. The explosive forces may be generated, for example, by igniting mixtures of gases such as hydrogen and oxygen, or liquids such as alcohol and hydrogen peroxide. To control or buffer the explosive force, a baffle may be interposed between the explosions and the products being processed. The baffle may be formed of a porous material to transmit waves to the semiconductor products while protecting the products from contaminants. Various operating parameters, including the flow rate of the fuel and the oxidizing materials, may be positively controlled. In another embodiment of the invention, a piston is used to transmit the explosive force. If desired, an annular space at the periphery of the piston may be maintained at atmospheric pressure to protect against wafer contamination.

Abstract: A method of fabricating an integrated circuit includes forming an isolation trench in a semiconductor substrate and partially filling the trench with a dielectric material so that at least the sidewalls of the trench are coated with the dielectric material. Ions are implanted into the substrate in regions directly below the isolation trench after partially filling the trench with the dielectric material. The dielectric along the sidewalls of the trenches can serve as a mask so that substantially all of the ions implanted below the isolation trenches are displaced from the active regions. After the ions are implanted in the substrate below the trenches, the remainder of the trench can be filled with the same or another dielectric material. The trench isolation technique can be used to fabricate memory, logic and imager devices which can exhibit reduced current leakage and/or reduced optical cross-talk.

Abstract: A GaN semiconductor device with improved heat resistance of the Schottky junction electrode and excellent power performance and reliability is provided. In this semiconductor device having a Schottky gate electrode 17 which is in contact with an AlGaN electron supplying layer 14, a gate electrode 17 comprises a laminated structure wherein a first metal layer 171 formed of any of Ni, Pt and Pd, a second metal layer 172 formed of any of Mo, Pt, W, Ti, Ta, MoSi, PtSi, WSi, TiSi, TaSi, MoN, WN, TiN and TaN, and a third metal layer formed of any of Au, Cu, Al and Pt. Since the second metal layer comprises a metal material having a high melting point, it works as a barrier to the interdiffusion between the first metal layer and the third metal layer, and the deterioration of the gate characteristics caused by high temperature operation is suppressed.

Abstract: A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of hemispherical grained polysilicon (HSG) as part of a dual-sided lower capacitor electrode. Prior to the dielectric formation, the lower capacitor electrode may be optionally annealed to improve capacitance.

Abstract: A cellular system using a code division multiple access (CDMA) scheme includes N (N is a positive integer) pilot channels and M (M is a positive integer) data channels. The pilot channels are used transmitting reference signals whose transmission signals are known in advance. The data channels are used for transmitting information. Each of the M data channels is made to correspond to one or a plurality of said N pilot channels.

Abstract: An imager having reduced floating diffusion leakage and a mechanism for improving the storing of collected charge is described. A polysilicon contact is provided between a floating diffusion region and a gate of a source follower output transistor, with the contact also electrically connected to a storage capacitor. The storage capacitor provides additional charge storage capacity to the floating diffusion region. In addition, an associated reset transistor has different dopant characteristics in the source and drain regions. The floating diffusion region may be used in the pixels of a CMOS imager or in the output stage of a CCD imager.

Abstract: A magnetic memory element includes a sense structure, a tunnel barrier adjacent the sense structure, and a synthetic antiferromagnet (SAF) adjacent the tunnel barrier on a side opposite the sense structure. The SAF includes an antiferromagnetic structure adjacent a ferromagnetic seed layer. The ferromagnetic seed layer provides a texture so that the antiferromagnetic structure deposited on the ferromagnetic seed layer has reduced pinning field dispersion.

Abstract: A micro structure has: a semiconductor substrate; an insulating film having a via hole and formed on the semiconductor substrate; an interlock structure formed on a side wall of the via hole and having a retracted portion and a protruded portion above the retracted portion; a conductive member having at one end a connection portion formed burying the via hole and an extension portion continuous with the connection portion and extending along a direction parallel to a surface of the semiconductor substrate.

Abstract: A method of monitoring one or more growing plants comprising: (i) providing at least one plant in a growth substrate which contains water, (ii) providing a monitoring system comprising (a) a first data storage means containing stored data on the optimum water oxygen levels for at least one, preferably at least two, sets of growth conditions and (b) a first calculating means for comparing input actual growth conditions and actual water oxygen levels with the stored data and producing a first output result and (c) input means for supplying to the monitoring system actual growth conditions and actual water oxygen levels, the process comprising: (iii) measuring the actual water oxygen level in the region around the roots of the at least one plant, (iv) providing the actual water oxygen level to the first calculating means, (v) determining at least one growth condition and supplying the growth condition to the first calculating means, whereby (vi) the first calculating means compares the actual water oxygen level

Abstract: A recordable optical information recording medium having an address t for each sector, comprises: an area A1 starting from an address t1 to which access is made only when a recording apparatus performs recording operation; an area A2 starting from an address t2 to which access is made either when the recording apparatus performs the recording operation or when the recording apparatus performs reproducing operation; and an area A3 starting from an address t3 to which access is made either when either the recording apparatus or a reproducing apparatus performs recording or when either the recording apparatus or the reproducing apparatus performs reproducing. The addresses t are set consecutively with respect to a physical arrangement of the sectors in each of the areas A2 and A3, and the area A1 has at least one inconsecutive part at which the addresses t are not consecutive with respect to the physical arrangement of the sectors.

Abstract: A method of efficiently preventing data loss, specifically a RAID 5 write hole, in data storage system by storing valid parity information at the storage controller level during data write operations. The method employs the use of redundant data structures that hold metadata specific to outstanding writes and parity information. The method uses the redundant data structures to recreate the write commands and data when a system failure occurs before the writes have completed.

Abstract: The invention relates to novel 7,8,9,10-tetrahydro-6H-azepino, 6,7,8,9-tetrahydro-pyrido and 2,3-dihydro-2H-pyrrolo[2,1-b]-quinazolinone derivatives and their use as active ingredients in the preparation of pharmaceutical compositions. The invention also concerns related aspects including processes for the preparation of the compounds, pharmaceutical compositions containing one or more of those compounds and especially their use as orexin receptor antagonists.

Abstract: A system of reducing power consumption in and active pixels sensor. The sensor is broken into different blocks, and each of the blocks is individually optimized. The optimization may include minimizing the parasitic capacitance on the readout bus, turning off biases when not in use, and operating in a way that minimizes static power consumption of different elements such as A/D converters.

Abstract: In an information recording device and method, user data are recorded in a recording medium having two or more recording layers and having a data area in which user data is recordable for each recording layer. A closing command is received after recording of user data in the data area of the recording medium is performed in response to a user-data write request. A minimum amount of lead-out data are written to the recording medium following an end position of the recorded user data in the data area of the recording medium, based on the received closing command.

Abstract: An electron beam detector detects a peak of a spectrum, and when a peak position is deviated from a reference position on the electron beam detector, a controller for controlling an electron beam position on the electron beam detector is used to correct a deviation. An electron energy loss spectrum is measured while controlling correction a deviation between an electron beam position on a specimen, and a peak position of the spectrum, and a spectrum measuring with the electron beam detector.

Abstract: The present invention relates to the inhibition of Hepatitis B virus (HBV) replication by RNA molecules of the present invention. Specifically, the RNA molecules of the present invention are double-stranded ribonucleic acid molecules (dsRNA). Specifically, the invention relates to small interfering RNAs (siRNA) which are double-stranded RNAs that direct the sequence-specific degradation of messenger RNA in mammalian cells. The invention relates to development of a new anti-HBV therapy by inhibition of Hepatitis B Virus (HBV) replication using stably-expressed short hairpin RNAs (shRNA), which degrade HBV pregenomic RNA and message RNAs. Included are methods of treatment of cancer by the administration of RNA molecules of the present invention in combination with surgery, alone or in further combination with standard and experimental chemotherapies, hormonal therapies, biological therapies/immunotherapies and/or radiation therapies.

Abstract: A semiconductor light-emitting device has a semiconductor layer containing Al between a substrate and an active layer containing nitrogen, wherein Al and oxygen are removed from a growth chamber before growing said active layer and a concentration of oxygen incorporated into said active layer together with Al is set to a level such that said semiconductor light-emitting device can perform a continuous laser oscillation at room temperature.

Abstract: Constant components and rotation fundamental mode components on the slide plane between a rotor and a stator are derived from a magnetic field distribution at a predetermined time. The analysis space is divided into a rotor space and a stator space. A fundamental mode on the slide plane is rotated by a rotation angle of a rotation magnetic field corresponding to a time-step width. A solution obtained in this state is added to the constant components. By using the addition result as the boundary conditions on the slide plane, non-linear magnetic field analysis is performed by taking into consideration the magnetic saturation in the stator space. The rotation fundamental mode on the slide mode is rotated by an angle obtained by subtracting the rotation angle of the rotor from the rotation angle of the rotation magnetic field corresponding to the time-step width.

Abstract: A single chip active memory includes a plurality of memory stripes, each coupled to a full word interface and one of a plurality of processing element (PE) sub-arrays. The large number of couplings between a PE sub-array and its associated memory stripe are managed by placing the PE sub-arrays so that their data paths run at right angle to the data paths of the plurality of memory stripes. The data lines exiting the memory stripes are run across the PE sub-arrays on one metal layer. At the appropriate locations, the data lines are coupled to another orthogonally oriented metal layer to complete the coupling between the memory stripe and its associated PE sub-array. The plurality of PE sub-arrays are mapped to form a large logical array, in which each PE is coupled to four other PEs. Physically distant PEs are coupled using current mode differential logical couplings an drivers to insure good signal integrity at high operational speeds. Each PE contains a small DRAM register array.

Abstract: The present invention teaches a method of forming a MOSFET transistor having a silicide gate which is not subject to problems produced by etching a metal containing layer when forming the gate stack structure. A gate stack is formed over a semiconductor substrate comprising a gate oxide layer, a conducting layer, and a first insulating layer. Sidewall spacers are formed adjacent to the sides of the gate stack structure and a third insulating layer is formed over the gate stack and substrate. The third insulating layer and first insulating layer are removed to expose the conducting layer and, at least one unetched metal-containing layer is formed over and in contact with the conducting layer. The gate stack structure then undergoes a siliciding process with different variations to finally form a silicide gate.