Abstract: Systems, methods, and apparatus are provided for electronic device manufacturing. The invention includes removing a first substrate carrier and a second substrate carrier from a moving conveyor using an end effector assembly and concurrently transferring the first and second substrate carriers from the moving conveyor to a support location via the end effector assembly. Numerous other aspects are provided.

Abstract: The present invention relates to systems and methods for controlled combustion and decomposition of gaseous pollutants while reducing deposition of unwanted reaction products from within the treatment systems. The systems include a novel thermal reaction chamber design having stacked reticulated ceramic rings through which fluid, e.g., gases, may be directed to form a boundary layer along the interior wall of the thermal reaction chamber, thereby reducing particulate matter buildup thereon. The systems further include the introduction of fluids from the center pilot jet to alter the aerodynamics of the interior of the thermal reaction chamber.

Abstract: In one aspect of the invention, a method for the improved operation of an electronic device manufacturing system is provided. The method includes providing information to an interface coupled to an electronic device manufacturing system having parameters, processing the information to predict a first parameter, and providing an instruction related to at least a second parameter of the electronic device manufacturing system wherein the instruction is based on the predicted first parameter. Numerous other aspects are provided.

Abstract: In a first aspect, an inventive apparatus for imaging a chip on a wafer includes a combined diamond chip image and kerf image having a plurality of sloped sides. The combined diamond chip image and kerf image includes a diamond chip image comprising a plurality of chip image rows that are parallel to at least one diagonal of the diamond chip image, and includes a kerf image adjacent to the diamond chip image. The kerf image comprises at least one kerf image row that is parallel to the at least one diagonal of the diamond chip image. The apparatus further includes a blocking material extending from the combined diamond chip image and kerf image to at least a periphery of an exposure field of a stepper. In a second aspect the imaging apparatus comprises an n-sided polygon-shaped combined chip image and kerf image. Also provided are inventive methods of manufacturing chips, and wafers manufactured in accordance with the inventive methods.

Abstract: In some aspects, a method of forming a memory cell is provided that includes (1) forming a first conductor above a substrate; (2) forming a diode above the first conductor; (3) forming a reversible resistance-switching element above the first conductor using a selective deposition process; and (4) forming a second conductor above the diode and the reversible resistance-switching element. Numerous other aspects are provided.

Abstract: A method of forming a memory cell involves forming a semiconductor junction diode in series with an antifuse. The cell is programmed by rupture of the antifuse. The semiconductor junction diode comprises silicon, the silicon crystallized in contact with a silicide. The silicide apparently provides a template for crystallization, improving crystallinity and conductivity of the diode, and reducing the programming voltage required to program the cell. It is advantageous to reduce a dielectric layer (such as an oxide, nitride, or oxynitride) intervening between the silicon and the silicon-forming metal during the step of forming the silicide.

Abstract: Oxides of both nickel and cobalt have lower resistivity than either nickel oxide or cobalt oxide. Nickel oxide and cobalt oxide can be reversibly switched between two or more stable resistivity states by application of suitable electrical pulses. It is expected that oxides including both nickel and cobalt, or (NixCoy)O, will switch between resistivity states at lower voltage and/or current than will nickel oxide or cobalt oxide. A layer of (NixCoy)O can be paired with a diode or transistor to form a nonvolatile memory cell.

Abstract: A first memory level includes a first plurality of memory cells that includes every memory cell in the first memory level. Each memory cell includes a vertically oriented p-i-n diode in the form of a pillar that includes a bottom heavily doped p-type region, a middle intrinsic or lightly doped region, and a top heavily doped n-type region. The first plurality of memory cells includes programmed cells and unprogrammed cells, wherein programmed cells comprise at least half of the first plurality of memory cells. Current flowing through the p-i-n diodes of at least 99 percent of the programmed cells when a voltage between about 1.5 volts and about 3.0 volts is applied between the bottom heavily doped p-type region and the top heavily doped n-type region is at least 1.5 microamps.

Abstract: A very high density field programmable memory is disclosed. An array is formed vertically above a substrate using several layers, each layer of which includes vertically fabricated memory cells. The cell in an N level array may be formed with N+1 masking steps plus masking steps needed for contacts. Maximum use of self alignment techniques minimizes photolithographic limitations. In one embodiment the peripheral circuits are formed in a silicon substrate and an N level array is fabricated above the substrate.

Abstract: In a first aspect of the invention, a first method is provided for aligning signals from a first receiver located in a first clock domain to a second receiver located in a second clock domain. The first method includes the steps of creating a programmable delay element between the first and second receivers, and selectively adding delay via the programmable delay element to the signals until the signals are aligned. Numerous other aspects are provided.

Abstract: A method is disclosed to form an upward-pointing p-i-n diode formed of deposited silicon, germanium, or silicon-germanium. The diode has a bottom heavily doped p-type region, a middle intrinsic or lightly doped region, and a top heavily doped n-type region. The top heavily doped p-type region is doped with arsenic, and the semiconductor material of the diode is crystallized in contact with an appropriate silicide, germanide, or silicide-germanide. A large array of such upward-pointing diodes can be formed with excellent uniformity of current across the array when a voltage above the turn-on voltage of the diodes is applied. This diode is advantageously used in a monolithic three dimensional memory array.

Abstract: The cleaning of silicon carbide materials on a large-scale is described. Certain silicon carbide materials in the form of wafer-lift pins, wafer-rings and/or wafer-showerheads are cleaned by using a combination of two of more of the following steps, comprising: high temperature oxidation, scrubbing, ultrasonic assisted etching in an aqueous acid solution, ultrasonication in deionized water, immersion in an aqueous acid solution, and high temperature baking. The silicon carbide materials may either be sintered or formed by chemical vapor deposition.

Abstract: Systems, methods and apparatus are provided for isolating a defect in a scan chain. The invention includes modifying a first test mode of a plurality of latches included in a scan chain, operating the latches in the modified first test mode, and operating the plurality of latches included in the scan chain in a second test mode. A portion of the scan chain adjacent and following a stuck-@-0 or stuck-@-1 fault in the scan chain may store and/or output a value complementary to the value on the output of the previous portion of the scan chain due to the fault. Such values may be unloaded from the scan chain and used for diagnosing (e.g., isolating a defect in) the defective scan chain. Numerous other aspects are provided.

Abstract: In a first aspect, a wafer loading station adapted to exchange wafer carriers with a wafer carrier transport system comprises a biasing element adapted to urge the end effector of the wafer loading station away from a moveable conveyor of the wafer carrier transport system upon the occurrence of a unscheduled event such as a power failure or an emergency shutdown. In a second aspect, an uninterruptible power supply commands a controller to cause the wafer carrier handler to retract the end effector from the wafer carrier transport system upon the occurrence of the unscheduled event, and provides the power necessary for the same. Numerous other aspects are provided.

Abstract: In a first aspect, a first apparatus is provided for inkjet printing. The first apparatus includes an inkjet head support that includes a plurality of inkjet heads. A first inkjet head of the plurality of inkjet heads is adapted to be independently moveable in both directions along a lateral axis relative to a second inkjet head of the plurality of inkjet heads. The first apparatus also includes a system controller adapted to control an independent lateral movement of the first inkjet head relative to the second inkjet head. Numerous other aspects are provided.

Abstract: The present invention relates to systems and methods for controlled combustion of gaseous pollutants while reducing and removing deposition of unwanted reaction products from within the treatment systems. The systems employ a two-stage thermal reactor having an upper thermal reactor including at least one inlet for mixing a gaseous waste stream with oxidants and combustible fuels for thermal combustion within the upper thermal reactor. The upper thermal reactor further includes a double wall structure having an outer exterior wall and an interior porous wall that defines an interior space for holding a fluid and ejecting same, in a pulsating mode, through the interior porous wall into the upper thermal reactor to reduce deposition of the reaction products on the interior of the upper reactor chamber.

Abstract: A method for treating a surface of a quartz substrate includes preparing a substrate to provide a working surface having an initial roughness; and then ultrasonically acid-etching the working surface to increase the roughness of the working surface by at least about 10%. In one embodiment, the initial surface roughness is greater than about 10 Ra, and in another embodiment the initial surface roughness is greater than about 200 Ra. In a still further embodiment, the initial surface area, if less than about 200 Ra, is increased to greater than about 200 Ra. In other embodiments of the present invention, the working surface roughness is increased by at least about 25% or at least about 50%. Simultaneous with the increase in surface area (as measured by the roughness), the surface defects are reduced to reduce particulate contamination from the substrate.

Abstract: A sensing system includes a plurality of probes arranged in a spaced relation around a stage that is adapted to support a substrate. Each probe includes a detection portion adapted to move from a known starting position toward an edge of the substrate that is supported by the stage; detect the edge of the substrate while the substrate is supported by the stage; generate a detection signal following said detection; and stop moving toward the edge of the substrate following said detection. A controller may determine an edge position of the substrate relative to the stage based on the known starting position of each detection portion and based on the detection signal generated by each detection portion. Numerous other aspects are provided.

Abstract: In one aspect, a wound management system is provided. The wound management system includes a multi-lumen cannula adapted to be disposed in a wound site. The multi-lumen cannula includes (1) a fiber optic light distribution system adapted to irradiate the wound site with light; (2) one or more catheters adapted to deliver a fluid to the wound site; and (3) one or more evacuation lines adapted to remove fluid from the wound site. Numerous other aspects are provided.

Abstract: An apparatus and process for abating at least one acid or hydride gas component or by-product thereof, from an effluent stream deriving from a semiconductor manufacturing process, comprising, a first sorbent bed material having a high capacity sorbent affinity for the acid or hydride gas component, a second and discreet sorbent bed material having a high capture rate sorbent affinity for the same gas component, and a flow path joining the process in gas flow communication with the sorbent bed materials such that effluent is flowed through the sorbent beds, to reduce the acid or hydride gas component. The first sorbent bed material preferably comprises basic copper carbonate and the second sorbent bed preferably comprises at least one of, CuO, AgO, CoO, CO3O4, ZnO, MnO2 and mixtures thereof.