Abstract: An electrical contact element that solves many problems associated with making electrical connections to integrated circuit chips. The contact element fits in small areas, but in some configurations can provide compliance in multiple directions to provide the required compliance. The contacts are shaped to provide relatively large stroke and also large force for good electrical contact. Contact elements according to the invention are incorporated into contactors for making electrical contact to Ball Grid Arrays for testing. Contact elements according to the invention are also incorporated into Ball Grid Array packages, and used as a mounting point for solder balls. The contact elements make the electrical connection withstand stress associated with differential thermal expansion.

Abstract: A manipulator for an automatic test equipment test head. The manipulator includes a plurality of motors that are coupled with load cells. A controller provides motor control signals based on the output of the load cells. The manipulator may be operated in compliant mode in which the motors drive the manipulator to move in response to external forces. The manipulator can be used in conjunction with a docking system in which a mechanical interface between the test head and the handling device defines the position of the test head relative to the handling device.

Abstract: A production operator interface is created using self-contained ActiveX controls each of which provide an interface to a specific part of the overall test system. These controls all communicate among themselves automatically. The production interface uses an ActiveX "tester control" which provides an application programming interface to the rest of the software control system. A library of self-contained ActiveX controls is provided which contains "operator controls" which may be "dragged and dropped" into an operator window to provide the operator with information and the ability to control the test system. In addition a semiconductor test system needs to be adapted to work with one or more different packaged device handlers or wafer probers which position a semiconductor device for testing by the tester. An ActiveX operator control allows an operator to select a handler driver from a library of handler drivers.

Abstract: A manipulator for a test head connected to automatic test equipment through a heavy, inflexible cable. The manipulator includes a telescoping column assembly to which is mounted a vertical member. A cradle holding the test head is mounted to the vertical member. The cable is clamped at the vertical member to reduce the amount of force exerted by the cable on the test head. The cradle includes movable members to allow fine positioning of the test head, while maintaining the test head isolated from cable force. Course motion of the test head may be made by moving portions of the manipulator on the opposite side of the cable clamp from the test head. Precise positioning of the test head relative to a handling device is accomplished through a positioning mechanism at the interface between the test head and the handling device. To allow the positioning mechanism to operate, the manipulator has compliance which allows the test head to be forced into position by the positioning mechanism.

Abstract: A ball grid array package for integrated circuit chips that is designed to facilitate testing. The balls are planarized with high precision to make electrical contact more accurate for testing. Contact, even on fine pitched arrays, can be readily made. A machine for planarizing the solder balls is disclosed. Also, a contact array, as well as a method of making the contact array are disclosed.

Abstract: An automatic test generation system in which the coverage levels of the tests can be controlled to tradeoff between the extent of the test conducted and the length of time required to execute the test. The system under test is modeled as an extended finite state machine made up of interconnected models. The coverage level of each model can be controlled to avoid generating paths that differ only be edges within certain models if those differing edges are already included in other paths. The coverage level for each model can be set automatically through a process which computes the effect on the total number of paths generated when the coverage level of selected models is varied.

Abstract: Automatic test equipment for semiconductor devices with low cost, easy to use software for developing and executing test programs. The tester is controlled with a computer work station running a commercially available spread sheet program. The commercially available spread sheet program is set as an application to provide a program development environment. In addition, programs made with the commercially available spread sheet program control the execution of tests on semiconductor devices. The tester is easy to program because use of the commercially available spread sheet program generates well known programming interfaces. In this way, the commercially available spread sheet program implements the software controlling the tester rather than merely providing spread sheet functions used by the application. The software controlling the automatic test equipment is therefore very easy to program or modify. It is also very easy to program.

Abstract: Automatic test equipment with programmable timing generators to generate digital signals and analog signals. The digital timing generator can be programmed to generate timing signals with a resolution finer than that of the master clock of the timing generator. Extremely fine resolution is achieved by specifying the numerator and denominator of a fractional portion of a period. A similar arrangement is used to allow fine frequency resolution for the analog timing generator. The fine resolution achievable with the timing generators allows the digital timing generator to be synchronized to the analog timing generator.

Abstract: A test system for multi-chip modules. Test points on the multi-chip modules are brought to the perimeter of the modules for easy access. The test points are grouped in arrays with an associated alignment post. The multi-chip module is probed with several independently positionable probes, each one of which can be independently aligned with one of the arrays of test points. Independent alignment of the test probes relaxes tolerances on the test points needed to ensure proper contact between the test pints and the probes. As a result, the test points can be made very small, thereby reducing the amount of the multi-chip module dedicated for testing. In the preferred embodiment, the probes are made using flex circuits.

Abstract: Method and apparatus for detecting whether load coils are attached to a telephone line. A stimulus waveform having multiple frequency components is applied to the line. The current and voltage at the near end of the line are coherently sampled and transformed to the frequency domain. The frequency spectra are used to compute auto and cross power spectra of the current and voltage. These power spectra are then used to compute the impedance on the line as well as a coherence function that indicates the extent to which the computed impedance was influenced by noise. If the coherence values indicate that the computed impedance is sufficiently reliable, load coils are detected by finding peaks in the magnitude of the impedance function or sign changes in the phase of the impedance function. Calibration, offset adjustments and ensemble smoothing are used to increase the accuracy of the results. The computation is fast because computing the spectra avoids the need for individual measurements at multiple frequencies.

Abstract: A line test system for diagnosing and segmenting faults in a switched telephone network. The system includes a remote measurement unit installed at a switch and a test system controller. The test system controller stores data about operating parameters of each of the subscriber lines when they are believed to be free of faults. When a fault is reported, the parameters are measured again. By comparison of the measured parameters with the stored parameters, the fault can be segmented between the premise and the network. Segmentation is performed using knowledge based analysis techniques. The actual source of the fault once it is repaired is also stored by the test system controller. This historical information is used to improve the accuracy of the knowledge based analysis techniques used for segmentation. The line test system is capable of detecting the presence of high impedance ringers.

Abstract: A modular electrical connector made from wafers. Each wafer contains one column of contact elements and is made separately. The wafers are of two different types, which snap together to form two row modules. The modules contain attachment features that allow them to be organized on a metal stiffener. Shield members can be optionally attached to each wafer so that the connector can be made in either a shielded or unshielded versions. In addition, each wafer includes windows through which selected contact elements can be cut to either improve the performance of the shields or to allow attachments of resistors.

Abstract: Automatic test equipment for semiconductor devices. The automatic test equipment contains numerous channels of electronic circuitry in which precisely timed test signal are generated. Significant advantages in both cost and size are achieved by incorporating multiple channels on one integrated circuit chip. To allow this level of integration without degrading timing accuracy, a series of design techniques are employed. These techniques include the use of guard rings and guard layers, placement of circuit elements in relation to the guard rings and guard layers, separate signal traces for power and ground for each channel, and circuit designs that allow the voltage across a filter capacitor to define a correction signal. Another feature of the disclosed embodiment is a fine delay element design that can be controlled for delay variations and incorporates calibration features. A further disclosed feature is circuitry that allows the tester to have a short refire recovery time.

Abstract: A printed circuit board tester incorporating hardware for fast capacitive measurements. The circuit board tester includes a digital signal processor that can both source and measure test signals. It also includes an amplifier having an input and an output connected to probes that can contact points on the printed circuit board. In use, the board tester is configured to place a capacitor on the printed circuit board under test in the feedback path of the amplifier. The digital signal processor generates a stimulus signal to the capcitor and the output of the amplifier is passed to the digital signal processor. The digital signal processor uses an adaptive filtering approach to determine convergence of the measurement, thereby minimizing measurement time. The arrangement is flexible and can be reconfigured to measure both large and small values of capacitance.

Abstract: An expandable gripper for semiconductor processing equipment that allows the pitch between semiconductor chips to be adjusted. To adjust the pitch, several pick and place mechanisms are mounted around a shaft using nuts. The threads of the nuts have variable leads, causing each to travel a different amount as the shaft rotates. All of the threads engage the shaft because a compliant layer is attached to the shaft.

Abstract: A production operator interface is created using self-contained ActiveX controls each of which provide an interface to a specific part of the overall test system. These controls all communicate among themselves automatically. The production interface uses an ActiveX "tester control" which provides an application programming interface to the rest of the software control system. A library of self-contained ActiveX controls is provided which contains "operator controls" which may be "dragged and dropped" into an operator window to provide the operator with information and the ability to control the test system. In addition a semiconductor test system needs to be adapted to work with one or more different packaged device handlers or wafer probers which position a semiconductor device for testing by the tester. An ActiveX operator control allows an operator to select a handler driver from a library of handler drivers.

Abstract: A connector for printed circuit boards. Electrical connections are made between two printed boards through flex circuits which have contact pads pressed against contact pads on each of the printed circuit boards. Sufficient, uniform pressure is maintained on the contacts through the use of compressible tubes behind the contact pads on the flex circuits. The compressible tubes are spring biased towards the flex circuits. When a circuit board is engaged in the connector, it compresses the compressible tube and the spring biasing mechanism, thereby generating sufficient contact force. The connector is easy to manufacture in a variety of sizes because its pieces are modular. Many of the pieces are of uniform cross section, facilitating use of low cost extrusion operations. An embodiment is disclosed in which one printed circuit board is pivoted into contact with the contact pads.

Abstract: An interface between a test head portion of automatic test equipment and a handling device such as a prober. The interface employs preloaded kinematic couplings between the test head and the handling device and between the probe card and the test head. These couplings allow the probe card to be repeatedly positioned relative to the component in the handling device. They also reduce forces on the probe card to prevent distortion of the probe card. The interface provides separate mechanical and electrical loops such that mechanical precision is not dependant on the electrical structure.

Abstract: A process for manufacturing semiconductor memories which includes a method of quickly and effectively identifying which faulty memory cells are to be replaced by redundant memory structures. Redundant rows and columns are assigned to replace rows and columns with faulty cells in an iterative process. At each pass, one row or column is identified for replacement. A row or column is selected for replacement based on priorities assigned to the faulty cells within the rows and columns. The highest priority cell for a row is the one in a column with the fewest other faulty cells. Where multiple cells have the same highest row priority, the cell in a row with the most faulty cells is given a higher priority. A similar dual measure is used for assigning column priorities to cells. Once a highest priority row and column are identified, the single element with the highest priority is identified.

Abstract: Automatic test equipment for semiconductor memories that provides testing of large arrays of semiconductor memory chips in parallel. Such massively parallel memory testing greatly enhances test throughput, thereby reducing cost. It greatly enhances the economics of testing memory device made according to a RAMBUS standard, which includes a low speed port and a medium speed port because it allows the same automatic test equipment to economically be used to test devices with the low speed port and the medium speed port.