Abstract: An electronic timekeeping system is implemented in bipolar integrated circuit technology for displaying time by way of a digital display. The bipolar circuitry is implemented utilizing integrated injection logic and has a stacked oscillator/regulator combination which provides a highly regulated timekeeping signal source. The regulator consumes a first amount of current in providing the regulated output, and the first amount of current is reconsumed by the series connected oscillator, thereby conserving system power.

Abstract: A system for detecting intruders in a building, using sets of light emitters and detectors. Interruption of a beam between an emitter and a detector produces a radio signal picked up by a control console. The system is easily installed because the emitters and detectors are battery powered, requiring no connection to house wiring, and the radio link between detectors and the control console avoids wiring for the signal circuit.

Abstract: A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology, is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator which permits direct or indirect addressing while reducing the number of ROM instructions required and hence the size of the ROM to permit fabrication on the smaller chip is embodied in the present invention. All memory instructions contain an address select bit to choose either the address contained in the ROM instruction word or the contents of the RAM address register which is loaded from the adder output. The RAM address register contents are incremented or added to by the adder to provide indirect addressing of the RAM while the ROM instruction word provides direct addressing of the RAM.

Abstract: An electronic timekeeping system is implemented in bipolar integrated circuit technology for displaying time by way of a digital display. The bipolar circuitry is implemented utilizing integrated injection logic with asynchronous counters having outputs synchronized with the clock before coupling to the succeeding counter function, such as between the seconds and minutes counters. "D" flip-flops are utilized such that a D input is provided instead of a D input.

Abstract: A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology is fabricated on a relatively small semiconductor chip resulting in high yield. The segment and digit drivers which are fabricated on the same semiconductor chip utilizing I.sup.2 L techniques have grounded emitters requiring a relatively large power drain to produce blank segments. A unique feature of the calculator is an automatic blanking circuit which turns off both the segment and digit drivers for blank digits to provide no power drain while selectively enabling the digit drivers and segment drivers so that the keyboard can be scanned utilizing the same digit drivers.

Abstract: A computing system includes a central processor unit (CPU) integrated on a monolithic chip, in combination with a plurality of external memory units. The CPU includes a parallel arithmetic logic unit (ALU) and an internal random access memory interconnected on a common parallel bus with an instruction register. The random access memory defines the general purpose data registers, program and memory address registers, and a multilevel program address stack. Timing circuitry in the CPU enables utilization of either serial or random access external memory units. The timing control of the CPU enables a method of operation characterized by sequential transmission of low order address bits, WRITE data, high order address bits and READ data over a common external parallel bus that interconnects the CPU with the external memory.

Abstract: Disclosed is an expandable calculator system of the type implemented on semiconductor chips and featuring additional data storage registers for increasing data storage capacity of the basic system. A basic calculator system comprising two semiconductor chips is provided with additional semiconductor chips each providing a plurality of separately addressable registers for storing data, to thereby increase the data storage capacity of the two-chip system. Ten registers are desirably provided per external chip, and a novel method of addressing particular external register chips and particular registers therein is utilized. First and second signals synchronize the internal timing of the external register chips and also enable communication to the external chips. After the external register chip has been enabled, the appropriate memory is addressed via the same lines on which the data is subsequently transmitted to the memory.

Abstract: A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator is a dual adder which selectively functions as a multibit word adder and also as a plurality of single bit adders. This dual functioning adder cooperates with the calculator system in such a manner as to reduce the total amount of circuitry required to implement the calculator function thereby permitting fabrication on the smaller chip. The dual adder is utilized, for example, to perform bit operations for use in flagging and 2's complement addition for subtraction operations as well as normal multibit word addition.

Abstract: Disclosed is a solid state watch having an electro optical display which is selectively actuated by a gravity switch contained in the watch casing and positioned such that upon a displacement from a horizontal of the watch the display is actuated. A preferred embodiment utilizes a triangular-shaped cavity having a ball-shaped conductor movably contained therein for engaging a pair of electrical contacts within the cavity for coupling power to the display. Furthermore, the displacement of the watch from horizontal must also be within a selected orientation range.

Abstract: A memory cell comprising field effect transistors for use in a random access memory array. The cell is of the dynamic type wherein data is stored on capacitive elements, and is self-refreshing; no circuitry external to the array is needed for refresh, other than clock sources. Five MOS field effect transistors are employed, with two non-overlapping clocks, a data buss for each row of the array and one address line for each column. The transistors and associated capacitors are arranged to reinforce a stored "1" or "0".

Abstract: A programmable logic controller implemented in semiconductor integrated circuits which contains a memory for storing multi bit instructions and one bit data words with a processor selectively coupled to the memory for operating on the data in accordance with the instruction. A one bit word width push down stack is selectively connected to the processor for storing partial solutions to processor computations. The partial solutions are read from the stack in reverse order to entry thereof in response to completion of calculations of another part of the computations. The solution to the other part is combined with a partial solution retrieved from the push down stack.

Abstract: A greatly simplified calculator circuit implemented, for example, utilizing I.sup.2 L technology, is fabricated on a relatively small semiconductor chip resulting in high yield. A unique feature of such calculator is a latched decoder for multiplexed digit outputs to the display. The latched decoder reduces the circuitry ordinarily utilized to provide the digit outputs to permit fabrication on the smaller chip. The digit outputs are selected one or more at a time by a load output instruction. A selected number of bits of the load output instruction selects the digit.

Abstract: A multiple pole bushbutton rotary switch has axial as well as rotary travel. A first dimple in the back of the rotor of a stem and rotor assembly is rotatable over a desired number of position indicating detents for selective positioning of the rotor. The stem is then pushable on its axis to make a second dimple located on the opposite surface of the rotor travel into a second detent on a substrate and make electrical contact between the rotor and contact within the second detent which is preferably coupled to circuit conductors on the substrate. An embodiment of the pushbutton rotary switch is particularly useful for controlling a plurality of different time-date setting functions of electronic watches with a single switch mechanism.

Abstract: Control of a drum printer by signals from an LSI/MOS calculator chip. Drum generated signals and control signals generated on a second LSI/MOS chip operating in synchronism with the calculator chip selectively provide for actuation of a line of print hammers.Further, two channels coupling the calculator chip to the control chip provide for flow of coded character words and function words for printing of both functions and characters on a given line.Further, control of the printer is accomplished by observing which digit time in the calculator chip a specific dedicated flag is set.

Abstract: A printer includes a print wheel having an outer circular row of typefaces comprising digits and punctuation signs and an inner circular row of typefaces comprising symbols, and hammer apparatus for actuating the typefaces of the print wheel to effect printing. The type wheel and the hammer apparatus are mounted on a carriage which travels along a path defining a left-hand group of printing positions and a right-hand group of printing positions. A cam extending along the path of the carriage functions to pivot the type wheel between a position wherein the outer row of typefaces is aligned with the hammer apparatus when the carriage is aligned with the left-hand group of printing positions and a position wherein the inner row of typefaces is aligned with the hammer apparatus when the carriage is aligned with the right-hand group of printing positions.

Abstract: A diaphragm type pushbutton actuator switch with self-contained contacts includes a pop-in head. The main switch body is mountable in a substrate or housing with an opening provided for the head. The head is then press-fittable into the main switch body for retention therein. With the head retained in the main switch body, it is movable therein to make or break electrical contact upon actuation.

Abstract: An electronic calculator system implemented in MOS/LSI semiconductor chips which contain data memory, an arithmetic unit, a read-only-memory for storing instruction words, and control circuitry for operating the system, all in monolithic semiconductor units. Parts of the instruction word are decoded at different locations on the chip to produce control functions, using logic arrays. To save space on the chip, the instruction word is transferred serially from an instruction register to the decode arrays where parts of the instruction word are stored and loaded into the arrays in parallel.

Abstract: Disclosed is an expandable calculator system of the type implemented on semiconductor chips providing additional data storage registers for increasing data storage capacity of the basic system. A basic calculator system comprising two semiconductor chips is provided with additional semiconductor chips each providing a plurality of separately addressable registers for storing data, to thereby increase the data storage capacity of the two-chip system. First and second control signals synchronize the internal timing of the external register chips and also enable communication to the external chips. The data system has 10 registers which are addressed by means responsive to instructions communicated via the data transmission path. A first set of data word digits is read into the appropriate memory, then right shifted, and then another set of data word digits are read in. Means are provided for clearing all registers on one chip of the internal register chip set.

Abstract: A solid state depth sounding system, for measuring depth and detecting the presence of underwater objects, comprises an oscillator, producing high frequency electrical signals, a transmitter, for intermittently amplifying those signals, a transducer, and a receiver. The transducer produces high frequency sound impulses from the intermittent amplified signals, and transmits those impulses through the water until they are reflected by some underwater object. The transducer also picks up the reflected sound impulses and provides a high frequency electrical signal to the receiver which amplifies and detects it to produce a return pulse related in analog value to the strength of the reflected signal. The time delay between the transmission and reception of the high frequency sound impulse, and consequently the distance to the reflecting object, is measured by applying either a transmit pulse or a return pulse to the serial input of a multibit BBD or CCD shift register with a specified number of parallel outputs.

Abstract: The disclosure relates to a high density, high speed random access memory (RAM) which uses one transistor per storage cell. The cells are in a matrix of rows and columns, and a sense and refresh amplifier is located in the center of each column. Row address circuitry selects one row to be read out. The data stored in the cells in the selected row are transferred to the sense and refresh amplifiers, and column address circuitry selects one of the rows to be coupled to circuitry which performs both input and output functions.