Patents Represented by Attorney, Agent or Law Firm Esther E. Klein
  • Patent number: 6993627
    Abstract: A data storage system (100) and a method of storing data are described including a cache (118) with a variable number of levels (210, 220, 230, 240). Each level in the cache (118) has a cache controller (212, 222, 232, 242) and a cache memory (214, 224, 234, 244) for storing data. An address mapping is recorded and applied between each of the levels of the cache (118). The address mapping corresponds to a point in time virtual copy operation such as a snapshot copy operation applied to the cache (118) and enables point in time virtual copy operations to be carried out in electronic time. A new level is created in the cache (118) when a point in time virtual copy operation is received by the cache and a corresponding address mapping is applied to the previous level in the cache (118).
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: January 31, 2006
    Assignee: International Business Machines Corporation
    Inventors: Henry Esmond Butterworth, Robert Bruce Nicholson
  • Patent number: 6757134
    Abstract: An improved design for a high density thin film inductive write head assembly is provided. A pedestal and back flux closure of ferromagnetic material are formed on opposite ends of a planarized first pole piece. A plurality of coils of conductive material are deposited on top of the first pole piece between the pedestal and back flux closure. The coils comprise a plurality of loops or turns having voids between the coil loops. A photo resist material is deposited in the voids between the coils and the back flux closure, which is hard baked. A layer of alumina is deposited over the coils and hard baked photo resist material. The pedestal, back gap, coils, photo resist, and alumina are planarized by using a chemical mechanical polishing process. The thickness of the photo resist material relative to the coils is reduced using an O2 reactive ion etching process. A hard carbon or alumina filler is applied to fill the gaps between the coils and the photo resist.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: June 29, 2004
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Hugo Alberto Emilio Santini
  • Patent number: 6728156
    Abstract: A memory array system is provided comprising a plurality of rows of memory cells, each row having an address, wherein each memory cell stores volatile data requiring periodic refreshing. A refresh controller controls the periodic refreshing of data in each row of memory cells. A refresh address counter indicates the address of the row of cells for refreshing. A temporary data storer is used for storing data from the memory cell indicated for refreshing. A data inverter inverts data from the memory cell indicated for refreshing. A comparator associated with the temporary data storer and the data inverter compares data in those devices. An indicator bit is associated with the refresh address counter to indicate whether the data stored in the address indicated by the refresh address counter is inverted.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: April 27, 2004
    Assignee: International Business Machines Corporation
    Inventors: Charles A. Kilmer, Shanker Singh
  • Patent number: 6639758
    Abstract: The present invention provides a depopulation version hard disk drive apparatus that has a reduced number of magnetic heads and suspension arms from a standard hard disk drive apparatus, wherein the magnetic head can still be properly controlled during a loading state. The hard disk drive apparatus includes a ramp which interfaces with the suspension arm when loading and unloading the arm. An angle of a second slope surface 61c of the ramp in the depopulation version hard disk drive is set larger than that of the corresponding slope surface of the ramp 6 the a standard version hard disk drive.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: October 28, 2003
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Mutsuro Ohta, Hiroshi Matsuda, Takahide Nakamura, Keishi Takahashi
  • Patent number: 6629200
    Abstract: A system and method are provided that reduce the amount of data held commonly in both high-ranking and low-ranking cache memories, thereby having each of those cache memories hold data more efficiently. More particularly, a computer system is provided with an HDC card 21 connected to an expansion bus 20 and an HDD unit 22 connected to the HDC card 21. The HDC card 21 is provided with a disk cache (high-ranking cache memory) and the HDD unit 22 is provided with a disk cache 54 (low-ranking cache memory). The HDC card 21 and the HDD unit 22 exchange select information for selecting a swap mode of each cache memory when the system is started up, thereby selecting different swap modes according to the exchanged select information respectively.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: September 30, 2003
    Assignee: International Business Machines Corporation
    Inventors: Atsushi Kanamaru, Hideo Asano, Akira Kibashi, Takahiro Saito, Keiji Kobayashi
  • Patent number: 6470421
    Abstract: A staging method and means for both device read and update write operations in which messages and commands between a storage subsystem and a fixed-block formatted RAID array emulating a variable-length record (CKD) formatted device for both read and write operations are evaluated to ascertain whether the record addressing was random and truly in record mode. If they are in that mode, then partial track staging by the RAID array control from the fixed-block formatted HDDs to a subsystem cache or the like would reduce device contention by reading and staging less than full track.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: October 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Thao B. Bui, James C. Chen, Chan Y. Ng
  • Patent number: 6411469
    Abstract: A transducer suspension system has a transducer head, layered member, and a load beam. The layered member is comprised of a support layer, an electrically insulating layer, an electrically lead base layer, and an electrically conducting layer. The electrical leads are formed from the combination of the base layer and electrically conducting layer. The resulting electrical leads are both flexible and highly conductive.
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: June 25, 2002
    Assignee: International Business Machines Corporation
    Inventors: Edward Hin Pong Lee, Randall George Simmons
  • Patent number: 6377418
    Abstract: The present invention provides a digital filter which is capable of preventing filter outputs from being discontinuous when a filter characteristic is changed. Initially, a servo assistant (SA) computes parameters for computing servo data, and based on the computed parameters, the SA judges an operating mode. If the mode has been changed, the SA will advance in processing. Next, the parameters of a filter are changed in correspondence with the judged operating mode, and the initial values of the interior variables of the filter are set to appropriate values.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: April 23, 2002
    Assignee: International Business Machines Corporation
    Inventors: Naoyuki Kagami, Akira Tokizono, Hien Dang, Arun Sharma, Sri M. Sri-Jayantha
  • Patent number: 6320713
    Abstract: A reference current and resistance is used to determine a reference voltage. A variable current is then applied to the MR read head, and is adjusted to produce a voltage equal to that of the reference voltage. Then, the known current and voltage is used to determine the resistance of the MR read head.
    Type: Grant
    Filed: September 14, 1999
    Date of Patent: November 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Larry LeeRoy Tretter, James Ernest Malmberg
  • Patent number: 6272573
    Abstract: A storage system is provided for storing data for a computer system where the storage capacity can be incrementally increased without disrupting the operations of the storage system. The storage system comprises a base unit, and a plurality of modular units. The modular units are inserted into the system as increased storage capacity is required. Each modular unit has an enclosure comprising top, bottom, and side walls. The bottom and top walls each have at least one power connector and data transmission connector. The bottom wall of a first modular unit enclosure attaches to the base unit enclosure and the top wall of the first modular unit enclosure can attach to the bottom wall of a second modular unit enclosure. At least one back plane is provided in each modular unit for providing attachment for a set of storage devices.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: August 7, 2001
    Assignee: International Business Machines Corporation
    Inventors: Jerry Lee Coale, Steven VanGundy
  • Patent number: 6256705
    Abstract: In a storage system comprising an array of storage devices, including a processor and memory, a plurality of logical tracks are organized on the storage devices in segments comprising columns striped across the storage devices. A system and method are provided for storing logical tracks in the storage devices. Sequentially logically related logical tracks are stored together in neighborhoods. Logical tracks of the same neighborhood A0 destaged at the same time are assigned to a single open segment with other logical tracks of the same neighborhood type. The time at which open segments are designated as closed segments to be written to the storage devices is based on performance, disk utilization and memory utilization criteria. Logical tracks are never split between segment columns. Also, attempts are made not to split a neighborhood of logical tracks being destaged together between segment columns.
    Type: Grant
    Filed: June 5, 1998
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Juan Li, Dung Kim Nguyen, Aare Onton, Kevin Frank Smith, Hai-Fang Yun
  • Patent number: 6223251
    Abstract: Each of HDDs 6 and 7 is partitioned into two drives, comprising an outer zone and an inner zone. Each outer zone having a faster read/write access rate is called the “faster portion”, whereas each inner zone having a slower read/write access rate is called the “slower portion”. In accordance with a control program in RAM 3, CPU 1 is caused to execute “mirroring” such that the faster portion of one of HDDs 6, 7 is paired with the slower portion of the other one of HDDs 6, 7. In so configuring, it is possible to execute “mirroring” such that a difference between the access rates of the faster zone of one of the disks and the slower zone of the other one of the disks is always kept large. Thus, whenever one of the disks having a faster access rate becomes ready earlier, it is possible to immediately start the next read/write to this disk without waiting for completion of the write to the other disk having a slower access rate, thereby to improve access efficiency.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: April 24, 2001
    Assignee: International Business Machines Corporation
    Inventor: Kazuo Nemoto
  • Patent number: 6192444
    Abstract: A method and system in accordance with the present invention provides additional addressable space on a disk for use by a host processor using a virtual data storage subsystem. The method and system includes defining at least one of a plurality of extended image devices on a disk and requesting an instant image to be addressed to an extended image device utilizing channel command words by a host processor. The method and system also includes reading the instant image utilizing commands, such as channel command words or common descriptor blocks, by the host processor. In a method and system in accordance with the present invention, a plurality of extended image devices are defined as extensions of a primary functional device. Data may be transferred between at least one of the plurality of extended images and the primary functional device, or between at least one of the plurality of extended image devices and another of the plurality of extended image devices.
    Type: Grant
    Filed: January 5, 1998
    Date of Patent: February 20, 2001
    Assignee: International Business Machines Corporation
    Inventors: Michael Wayne White, Patrick James Tomsula, David Serls
  • Patent number: 6178489
    Abstract: A method and apparatus for managing update writing in place in linear address space mapped memories. This is attained by partitioning the memory into compressed and uncompressed areas, estimating the percent of compressible images of fixed-length symbol strings recordable into the image locations, revising the estimate upward or downward as a function of the persistency of runs of writes to one area or the other, and adjusting the relative number of locations in the areas proportionally to the revised estimate.
    Type: Grant
    Filed: June 8, 1998
    Date of Patent: January 23, 2001
    Assignee: International Business Machines Corporation
    Inventor: Shanker Singh
  • Patent number: 6151685
    Abstract: In a storage system comprising an array of storage devices including a processor and memory, a plurality of data blocks are organized on the storage devices in segments striped across the storage devices. A main directory, stored in memory, contains the location on the storage device of each of the data blocks. For each segment a segment directory having information on the data blocks in the segment is stored on the storage devices. When a damaged segment directory is detected, a checkpoint of the main directory is written to the storage devices. A list is maintained of damaged segment directories such that segments on the damaged segment directories list are not garbage collected. Following a main directory recovery procedure, the damaged segment directories are reconstructed using the main directory.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: November 21, 2000
    Assignee: International Business Machines Corporation
    Inventors: Juan Li, Dung K. Nguyen, Mien Shih, Hai-Fang Yun
  • Patent number: 6148352
    Abstract: A storage system is provided for storing data for a computer system where the storage capacity can be incrementally increased without disrupting the operations of the storage system. The storage system comprises a base unit, and a plurality of modular units. The modular units are inserted into the system as increased storage capacity is required. Each modular unit has an enclosure comprising top, bottom, and side walls. The bottom and top walls each have at least one power connector and data transmission connector. The bottom wall of a first modular unit enclosure attaches to the base unit enclosure and the top wall of the first modular unit enclosure can attach to the bottom wall of a second modular unit enclosure. At least one back plane is provided in each modular unit for providing attachment for a set of storage devices.
    Type: Grant
    Filed: December 24, 1997
    Date of Patent: November 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Jerry Lee Coale, Steven VanGundy
  • Patent number: 6112277
    Abstract: A staging method and means for both device read and update write operations in which messages and commands between a storage subsystem and a fixed-block formatted RAID array emulating a variable-length record (CKD) formatted device for both read and write operations are evaluated to ascertain whether the record addressing was random and truly in record mode. If they are in that mode, then partial track staging by the RAID array control from the fixed-block formatted HDDs to a subsystem cache or the like would reduce device contention by reading and staging less than full track.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: August 29, 2000
    Assignee: International Business Machines Corporation
    Inventors: Thao B. Bui, James C. Chen, Chan Y. Ng
  • Patent number: 6112255
    Abstract: A method and means for performing logical-combining functions such as XOR operations in a RAID 3 or 5 array or a combinational configuration of disk drives. The logical combining occurs below the device attachment interface and is used in generating new parity for write update operations and data rebuilding. Each disk drive is modified to use a segmented and address synchronized buffer in the write and read paths, and a logical circuit that combines the data in the write path before buffering with the data in the read buffer as it is read out from the buffer. The logically combined result is presented at the device read path interface. The combined data from a first disk drive interface is introduced into the write path of a second path through the second device interface and the logical combining repeated ad seriatim, the device interfaces being connectable in a daisy-chain manner and configurable by array controller commands.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: August 29, 2000
    Assignee: International Business Machines Corporation
    Inventors: George Anthony Dunn, Richard Rolls, James Shipman
  • Patent number: 6092215
    Abstract: A system and method are provided for coordinating command for updating and reconstructing data in an array of storage devices connected to a computer system when multiple initiators issue commands. Sets of data blocks and corresponding parity blocks are arranged on a plurality of storage devices, such that a data block can be reconstructed using a set of data blocks and at least one parity block. When a new data block is written to the disk drive, a corresponding old parity block is write updated with an updated parity block. When reconstructing an unavailable data block an initiator issues a read command to each storage device having a data block or a parity block used for reconstructing the unavailable data block. Each read command is enqueued on a command queue for each storage device in a priority order coordinating each read command with any write update command for the same block so that a new data block and an old parity block are not read as part of the same parity stripe and vice versa.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: July 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Paul Hodges, Robert Wesley Shomler
  • Patent number: 6065005
    Abstract: A method is described for operating a data processing system having a plurality of processors to sort a set of data records each having an associated key for governing the sort process. The method comprises determining a range for the key values by sampling the key values. The range is divided into a plurality of quantiles, one for each processor, each quantile having a respective index. At each processor, a plurality of buckets are defined, each bucket corresponding to a respective one of a plurality M.sub.p of subintervals in the quantile, each subinterval having a respective index. The index of the quantile in which the key value lies and the index of the subinterval in which the key value lies are determined directly from the key values using fast operations. Each key is distributed to the processor corresponding to the quantile in which the key value lies.
    Type: Grant
    Filed: December 17, 1997
    Date of Patent: May 16, 2000
    Assignee: International Business Machines Corporation
    Inventors: Shmuel Gal, Dafna Sheinwald, John M. Marberg, Alan Hartmann, Mila Keren, Zvi Yehudai