Abstract: Asymmetric finite impulse response (FIR) filters are used to estimate gradients for re-sampling models used in image resizing. Better than conventional 3-tap symmetric FIR filters, these filters provide good edge and extended-frequency responses with good narrow peak sharpening characteristics. These filters emphasize accurate edge handling, where gradients are steepest, over accurate peak handling, where gradients are shallowest. This results in superior zone-plate test signals and better resized image quality.

Abstract: Linear interpolators that are both accurate and cost effective to implement in hardware are presented. These interpolators use a multi-bit value approach that permits adders to be used instead of multipliers. The inherent error known in multi-bit value approaches is corrected by using a more accurate approximation for a distance ratio used in interpolation calculations.

Abstract: Digit equilibrate current is reduced during self-refresh mode by reducing the time that the sub-arrays in a volatile memory are precharged with the bleeder device enabled. A selected sub-array is precharged with the bleeder device enabled one cycle prior to having a given row of memory cells refreshed. An auto-refresh counter and row address block are used to generate a section address and a row address of memory cells to refresh. Each sub-array has a given row of memory cells refreshed before another row of memory cells in a given sub-array is refreshed.

Abstract: A program guide system is provided in which an interactive television program guide that is implemented at least partially on user television equipment receives program listings data and real-time data such as sports scores, news data, and the like. The real-time data may be stored in a database maintained by the program guide, so that the program guide may access the stored real-time data at a later time. Updated program listings information may be provided to the program guide as part of the data stream in which the real-time data is provided. Unique keys may be generated for the program listings data and real-time data associated with each live event. The keys may be compared at the program guide to determine which program listings correspond to which items of real-time data. A controllable ticker may be displayed on top of a television program on the user television equipment. The controllable ticker may be sponsored. Different types of real-time data may be assigned different expiration times.

Abstract: An interactive television program guide system and method in which functions that have not been provided before by other interactive television program guide systems is provided. The interactive guide may, for example, provide users with an opportunity to preview pay-per-view programs before ordering. The guide may, for example, display a pay-per-view program preview in a video window. The video window may occupy a portion of the screen. If desired, a video window of the video from the currently tuned to channel may be displayed simultaneously in a second video window. In response to the user ordering a previewed pay-per-view program, the interactive guide may explode the pay-per-view program preview window into a full-screen video.

Abstract: In a dynamo-electric machine, a stator having a terminal board with at least one pair of slots located along its inside circumference, includes at least one pair of coil holders. Each coil holder is cantilevered from the terminal board at the ends of a pair of slots, and a wire guide is positioned on each coil holder. A wire depositing needle and the stator are placed in relative motion, which causes the guide to support the wire as it is transported along its surface. Coils of wire are created as each pair of slots is wound. The invention will typically be used to form multiple coil windings on a single stator.

Abstract: A programmable logic device is provided with phase-locked loop (“PLL”) circuitry that includes two serially connected PLL circuits. An input clock signal is processed by a first of the PLL circuits to produce an intermediate clock signal having a frequency different from the input clock signal frequency. The intermediate clock signal is processed by the second PLL circuit to produce a final modified clock signal having a frequency different from both the input clock signal frequency and the intermediate clock signal frequency. By providing two serially connected PLL circuits, each PLL circuit can be required to operate with frequencies in a narrower range than might otherwise be required in a single PLL circuit required to produce a given input-to-final frequency change. Other circuitry on the programmable logic device (e.g., input/output registers and programmable logic circuitry for processing data signals) is responsive to the input and final modified clock signals.