Abstract: A high speed active link switching technology suitable for implementing field programmable gate arrays using current mode logic in the high speed data path, and CMOS steering logic outside the high speed data path to enable the high speed switching logic and to implement multiplexer, selector and crossbar switch functions. High speed emitter follower logic compatible with the high speed switching logic for level shifting, buffering, and providing more current sink or source capacity is also disclosed. An advantage of the active link technology disclosed herein is that the active links do not degrade rise and fall times of high speed data signals nearly as much as the passive links of prior art field programmable gate arrays thereby enabling use of FPGAs in higher speed applications than was previously possible.

Abstract: A license restriction management system having wrapper programs and agents as appropriate to manage launches of application programs in distributed systems of computers having a multiplicity of different operating systems. The system includes passive monitoring where only data regarding launches is collected or active monitoring where the number of copies of licensed programs in execution at any particular time is actively controlled by the agents and wrappers in cooperation with a license restriction management process. Configuration of the agents to use TCP or UDP communication protocols and to do automatic denial of unauthorized applications based upon either locally kept or centrally kept lists of authorized applications.

Abstract: This disclosure is directed to novel systems and methods for displaying an interactive event, such as a race car video game. Numerous display devices are disclosed for displaying video and audio elements of the video game to both current players and to individuals not currently playing the video game. The race car video game further has seating for two occupants, a driver and a crew member and has a separate video monitor for the crew member, through which the crew member can selectively view the race from different viewpoints and can obtain race information. The display of the race car game to individuals not currently playing the game varies according to several factors to enhance the attraction and interest in the race car video game.

Abstract: An interface circuit for use in the layout of padframe interface circuits for field programmable gate arrays having a plurality of I/O cells each of which may be programmed as an input or an output (or both) and a programmable connection matrix which provide programmable pathways between the data output signals generated by the core array of logic blocks and I/O cells programmed as outputs and provide programmable pathways between I/O cells programmed as inputs and data input conductors going into the core array. The interface circuits are all substantially identical in structure, and each includes a sufficient number of power and ground connections to supply adequate current to the number of I/O cells the interface has. Each interface circuit also includes at least one and preferably two open spaces into which conductive paths may be laid out to carry power to the core array or carry dedicated signals to circuits other than the core which also reside on the integrated circuit.

Abstract: A system for hierarchical data storage management and transparent data backup in a high speed, high volume Fibre Channel Arbitrated Loop environment comprising first and second Fibre Channel Arbitrated Loops, each coupling a Transaction Server and backup HSM server to high speed disk drives and mirrored high speed disk drives respectively. The two loops are coupled by a Bridge compatible with the Fibre Channel Arbitrated Loop protocol which forwards write transactions directed to the mirrored disk drives from the first loop the second but keeps read transaction from the Transaction Server to the high speed disk drives on the first loop isolated from backup and HSM transactions occurring on the second loop between the backup HSM server, the mirrored disk drives and backup storage devices coupled to the backup HSM server.

Abstract: A process for reducing the amount of overhead data in ATM cell headers prior to transmission both upstream and downstream on an HFC cable plant or other transmission media using SCDMA on at least the upstream path, without loss of either IP or Ethernet addressing information. A virtual link between each remote unit and a central unit is established using multiplexing to establish a virtual link to every remote unit. Downstream ATM cells are optimized by stripping off all but 2 bytes to leave a 50 byte cell. Incoming IP packets have their IP addressing information used to look up Ethernet domain address information for the RU and destination process to which this RU is coupled. An Ethernet header is appended to each IP packet as is RFC 1483 bytes to signal the start of the packet. The packet is parsed into 48 byte ATM cell payloads. VPI/VCI information for the virtual link of the remote unit to which the packet is bound is looked up using the Ethernet address information.

Abstract: A learning half bridge and bridge for a Fibre Channel Arbitrated Loop and switching protocol. A half bridge can be coupled to a local loop segment and a remote loop segment. The half bridge includes transmit and receive ports implementing predetermined switching and conflict resolution rules and a memory storing a forwarding table. Typically the switching rules are implemented using state machines. The state machines implement a switching protocol that controls transitions between states which control switching connections, writing of data to memory and reading of data from memory and preemption of conflicting OPN primitives. Each half bridge includes a local return segment that can be switched by the state machines to bypass the remote loop segment if both the source node and destination node are on the local loop segment so as to make the local loop segment a complete Fibre Channel Arbitrated Loop.

Abstract: A duty cycle controller for generating proper control signals for an SRAM in an FPGA in the proper sequence and spaced at the proper times to guarantee proper operation of the SRAM regardless of the frequency of duty cycle of the clock selected by the user to synchronize and drive operations of the SRAM.

Abstract: A process for significantly decreasing processing time, reducing capital costs, increasing yield, improving quality, and improving the safety of refining petroleum residues and sludges generated by the oil producers, refineries and re-refiners comprising the steps of heating under vacuum the petroleum residues and sludges with steam or inert gas injection or both until a temperature ranging from between 680.degree. F. to 1000.degree. F. is attained and holding the mixture at this temperature for a short residence time of from less than an hour to abut 6 hours while vacuum and sparging are being carried out to generate asphalt. Volatile products are condensed to produce fuel, waxy oil and can be further processed to produce refined fuel, wax and dewaxed oil.

Abstract: A configurable SRAM for a field programmable gate array. Two memory arrays each have a data input, a data output, a write enable input and port A and B address inputs. First and second address buses are selectively coupled to the port A and port B address inputs through multiplexers such that different configurations can be achieved. The multiplexers are controlled by a dual port/single port steering signal and a x1/x2 steering signal such that the following configurations can be achieved: 32 x1 dual port; 32 x1 single port and 16 x2 single port. In dual port configurations, simultaneous read and write operations to different cells can occur. In x2 configuration, each array is operated as an independent memory with its own address input, its own data output and its own data input.

Abstract: A method and apparatus for carrying out synchronous code division multiple access (SCDMA) communication of multiple channels of digital data over a shared transmission media. The system includes modems at remote units and a central unit to receive time division multiplexed digital data arranged into timeslots or channels and uses orthogonal codes to encode each channel of multiple data and spread the energy of each channel data over a frame of data transmitted in the code domain. Spreading the data this way makes the system less susceptible to impulse noise. Frames are synchronized as between remote and central units using a ranging scheme which is also useful in any other system transmitting data by frames in a distributed system where synchronizing the frames as between all units regardless of differences in propagation delays is necessary. Each frame in the SCDMA modulation scheme includes a gap or guardband containing no other data.

Abstract: A method and apparatus for carrying out synchronous co-division multiple access (SCDMA,) communication of multiple channels of digital data over a shared transmission media such as a cable television system coaxial cable, a fiber optic or copper conductor telephone link, terrestial microwave, satellite link, local or wide area network, wireless including cellur network or some combination of these media using suitable interface circuitry. The system includes modems at remote units and a central unit to receive time division multiplexed digital data arranged into timeslots or channels and uses orthogonal codes to encode each channel of multiple data and spread the energy of each channel data over a frame of data transmitted in the code domain. Spreading the data this way makes the system less susceptible to impulse noise.

Abstract: The genus of apparatus according to the teachings of the invention is characterized by use of a heat conducting elastomer which is compressed between an integrated circuit and a surface of a chassis made of heat conducting material such as Aluminum. The elastomer conducts heat from the integrated circuit to the surface of the chassis where it warms the entire chassis and is radiated to the ambient and removed by convection cooling. Since the chassis provides a much greater radiating and convection cooling surface, cooling of the integrated circuit is enhanced.

Abstract: A low noise clock oscillator in modular form to plug into a standard 14 or 8 pin DIP clock oscillator socket on the motherboard of a host device to retrofit the host device without redesign of the host device motherboard so that the host device can reduce its EMC emissions sufficiently to pass EMC emission tests. The oscillator is characterized by use of a spread spectrum clock generator, EMC filters between the clock generator and the Vcc, ground and clock bus coupling points to the motherboard and a single point ground connection to the motherboard. This oscillator module allows an easy retrofit to a host device that has already been designed to substantially lower EMC emissions that can be traced to the clock by as much as 20 dB without expensive, time consuming redesign efforts to add shielding, more grounds and possibly reroute the motherboard traces.

Abstract: A portable RF transmitter having an audio plug extending therefrom which mates with the earphone or output jack of an audio source such as a portable battery operated CD or tape player and having no external antenna. The portable RF transmitter modulates audio signals from the audio source onto an FM carrier and transmits them to an FM receiver mounted on a headset worn by a user. The RF transmitter uses its own ground circuit and the ground circuit of the audio source as two elements of a short dipole. The two ground circuits are electrically isolated at RF by an RF choke but connected together at audio frequencies by the low impedance of the choke at audio. The choke's leakage inductance also reduces the capacitive reactance of the dipole antenna for better power dissipation. A transformer coupling the RF output to the dipole transforms the impedance of the dipole to a value closer to the output impedance of the RF transmitter.

Abstract: A method and apparatus for carrying out synchronous codivision multiple access (SCDMA) communication of multiple channels of digital data over a shared transmission media such as a cable television system coaxial cable, a fiber optic or copper conductor telephone link, terrestial microwave, satellite link, local or wide area network, wireless including cellur network or some combination of these media using suitable interface circuitry. The system includes modems at remote units and a central unit to receive time division multiplexed digital data arranged into timeslots or channels and uses orthogonal codes to encode each channel of multiple data and spread the energy of each channel data over a frame of data transmitted in the code domain. Spreading the data this way makes the system less susceptible to impulse noise.

Abstract: The object of this invention is to provide a receptacle with a closure cap which is molded simultaneously with the receptacle body by using blow mold machine. A synthetic resin material is introduced into a pair of mold halves and a fluid such as air is injected into the tube to expand the tube against the walls of the mold thereby shaping the receptacle body. The synthetic resin receptacle of this invention comprises a tubular receptacle body 1, a small tube 2 at one end of the tubular receptacle body for filling, a closure cap fitting portion 3 formed at the top end of the vessel body, a diametrically small cut-out portion 5 joining the top end of said closure cap fitting portion and having a small bore, a cap body 4 having reversed-C like shape in a hollow configuration and joining the cut-out portion 5. A projection 7 provided in the center portion of the vertical inner surface of said closure cap body plugs the small bore.

Abstract: An apparatus for accelerated Fiber Channel protocol handshaking and data exchange involves dividing a Fiber Channel arbitrated loop architecture up into a plurality of arbitrated subloops, each of which arbitrates locally using the same fundamentals as the Fiber Channel arbitration protocol but with some slight modifications which do not affect the compatibility of standard Fiber Channel nodes. Each subloop is coupled to a hub port which contains a state machine which does switching function and fill word generation to implement the accelerated protocol by using a plurality of switching, fill word generation and token passing rules. The state machine in each hub port is coupled to its local subloop and to its neighboring hub ports through a single TDMA bus which has timeslots dedicated to carrying broadcast loop and return loop traffic and control token traffic.

Abstract: A method and apparatus for carrying an ATM communication protocol on a hybrid fiber coax CATV system. Point to point communication is supported by use of synchronous code division multiplexing on the physical and by assigning on the MAC layer one or more orthogonal SCDMA codes exclusively for use by pairs of devices needing to communicate such the head end and any customer premises equipment. Quality of service or guaranteed bandwidth availability is implemented by controlling the code space at the MAC layer such that certain CPEs having in use peripherals which cannot tolerate interruptions in data flow may reserve one or more SCDMA codes for use exclusively by them. Standard ATM cells are modified by the addition of a two byte virtual link header which identifies to which CPE a particular ATM packet is destined. This virtual header also makes possible broadcast and multicast of packets from the head end to all CPEs.

Abstract: An RF linear accelerator using CW or low amplitude pulsed RF excitation which can efficiently accelerate charged particles from 0.1 C to relativistic velocities in excess of 0.9 C. A charged particle source feeds charged particles having velocities of about 0.1 C into a first type RF LINAC having a plurality of side coupled resonator cavities each having a drift tube in the middle. The RF length of the cavities is set relative to the velocity of the particles and the RF excitation wavelength such that the particles experience in-phase accelerating E fields in the gaps on either side of the drift tube and are shielded from decelerating E fields while inside the drift tubes. The RF coupling cavities establish sufficient phase change between adjacent resonators such that the particles arrive in the adjacent resonator cavities in synchronization with oscillations in the standing wave therein so as to experience further acceleration. The first RF LINAC accelerates the particles to 0.5 C approximately.