Abstract: A programmable high-speed frequency divider is provided in which a stage for forming a frequency divider, which is capable of being programmed with a programmable dividing ratio, is simplified in order to reduce the area and circuit complexity. The programmable frequency divider includes a first synchronizing element coupled to an output of a logic detection circuit for generating a synchronized divider output, an additional synchronizing element coupled to the output of the logic detection circuit for receiving its clock from the output of a divide-by-two circuit and generating a special synchronized load output, and combinational logic blocks that receive the load output and generate load signals for bit-cells for detecting the state of all stages. Preferably, start-up circuitry is included within the frequency divider to ensure that the frequency-divider never goes into a false state.

Abstract: A system, method and computer program product are disclosed for dynamically updating a computer application. According to the method, a subscription request is sent to a publish/subscribe server so as to receive updates to the computer application. An update notification or an update is received from the publish/subscribe server, and the update is dynamically applied to the computer application during execution without restarting the computer application. In one embodiment, the update notification is received from the publish/subscribe server, a request for the update is sent to a second server, and the update is received from the second server. Also provided are a system, method and computer program product for sending updates to a computer application.

Abstract: A device is provided for synchronizing, on a reference clock signal, an exchange of data with a remote member. The device includes a main variable delay line controlled by a first processing unit coupled to a phase comparator in order to generate a delayed clock signal transmitted to the remote member. One input of the main variable delay line receives the reference clock signal.

Abstract: A routing device is provided for transporting digital data from demodulated digital television signals. The routing device includes a network that routes the digital data to demultiplexers via at least one decoding module. The network includes means for connecting to at least two independent demodulation channels, with each of the demodulation channels producing digital data from a demodulator. The network allows individual routing of the digital data from each of the demodulation channels to the demultiplexers via at least one decoding module. Also provided are a corresponding routing method and a host device that includes such a routing device. Exemplary applications of the routing device and method are a digital television receiver with an image incorporation (picture in picture) function, and a digital television combined with a recording device.

Abstract: A method of interpolating images intended to be incorporated, into a sequence of moving images, each between a first original image and a second original image of the sequence, comprises an estimation of a motion vector associated with a given pixel block of a current interpolated image. This estimation comprises the preselection of P first motion vectors associated with first other pixel blocks that are adjacent to the given pixel block in the current interpolated image, for which there is already an estimated motion vector. It also comprises the preselection of at most Q second motion vectors associated respectively with second other pixel blocks adjacent to the given pixel block in the preceding interpolated image. Finally, it comprises the selection of the motion vector which minimizes a cost function from the first and second preselected motion vectors.

Abstract: A memory cell (1), includes a flip-flop (2) that has additional read/write terminals; a 1-bit write line (wb11); a first transistor (T4) switching between the 1-bit write line and the terminal, its gate being connected to a word selection line (W11); a 0-bit write line (wb10); a second transistor (T3) switching between the 0-bit write line and the terminal, its gate being connected to a word selection line (W12); a bit read line (b1r); and read transistors (T1, T2), with one of their gates being connected to a read/write terminal and the other being connected to a word selection line.

Abstract: An improved method of implanting cells in the body of a patient includes positioning viable cells on a support structure. One or more blood vessels may be connected with the support structure to provide a flow of blood through the support structure. A support structure may be positioned at any desired location in a patient's body. The support structure may be configured to replace an entire organ or a portion of an organ. An organ or portion of an organ may be removed from a body cells and/or other tissue is removed to leave a collagen matrix support structure having a configuration corresponding to the configuration of the organ or portion of an organ. Alternatively, a synthetic support structure may be formed. The synthetic support structure may have a configuration corresponding to a configuration of an entire organ or only a portion of an organ.

Abstract: A page buffer is provided for an electrically programmable memory that includes multiple memory cells forming multiple memory pages. The page buffer includes a register for at least temporarily storing data read from or to be written to the memory cells of a selected memory page. The register includes multiple latches and multiple buffer elements. Each of the latches is coupled to at least one signal line for transferring the data bit that is stored in the latch. Each of the buffer elements decouples an output of a corresponding one of the latches from the signal line, with the buffer element driving the signal line according to the data bit stored in the corresponding latch. Also provided is a method of transferring data from a register to signal lines in an electrically programmable memory.

Abstract: A Phase-Locked Loop with multiphase clocks is provided. The Phase-Locked Loop includes a main loop, a calibration loop, and Control Logic. The main loop includes, coupled in series, a Phase Frequency Detector, a Main Charge Pump, a Main Loop Filter, a Multi-Phase Voltage Controlled Oscillator and a Phase-switching Fractional Divider. The calibration loop is coupled to the Phase Frequency Detector, and comprises a Calibration Charge Pump, a Demultiplexer and Y Calibration Loop Filters, with Y being an integer. The Control Logic controls the Phase-Switching Fractional Divider and the Demultiplexer. A Reference Frequency Signal is coupled to the Phase Frequency Detector and a Calibration Signal is coupled to the calibration loop. The main loop further comprises a Phase-adjusting Block coupled to a Multiplexer. The Phase-adjusting Block is arranged so as to receive at least one correction signal from the calibration loop.

Abstract: The present invention provides a rotatable storage device including a rotatable platform configured for storing and allowing ease of access to electronic devices such as, printers, facsimile machines, computers, scanners, and others. The rotatable platform include high and low voltage receptacle for connection to the electronic devices. The high and low voltage receptacles provide power, as well as data and voice communication to the electronic devices. The receptacles are connected to a rotatable connector allowing the rotatable platform and receptacle to be rotated in unison without the twisting or tangling of the power and connecting wires. The rotatable connector can take the form of sliprings, brushes, mercury rotatable connectors, or other known devises.

Abstract: A Phase-Locked Loop with multiphase clocks is provided. The Phase-Locked Loop includes a main loop, a calibration loop, and a Demultiplexer. The main loop includes, coupled in series, a Phase Frequency Detector, a Main Charge Pump, a Main Loop Filter, a Multi-Phase Voltage Controlled Oscillator and a Phase-switching Fractional Divider. The calibration loop includes Y Calibration Loop Filters, with Y being an integer, coupled to the Multi-Phase Voltage Controlled Oscillator, and Control Logic for controlling the Phase-Switching Fractional Divider. The Demultiplexer is coupled between an output of the Main Charge Pump and inputs of the Main Loop Filter and the Y Calibration Loop Filters. A Reference Frequency Signal is coupled to the Phase Frequency Detector, a control signal from the Control Logic is coupled to the Demultiplexer, and a Calibration Signal is coupled to a control input of the Control Logic.

Abstract: A method and system enter a correction for a previously sent message, determine whether to send a complete corrected message or a message correction specification, and send the selected message to a messaging server. The messaging server receives the message correction specification and a message identifier (ID), and sends the message correction specification and the message ID to a recipient client system if a message with a corresponding message ID has previously been sent to the recipient client system. Then, the recipient client system receives the message correction specification and message ID, retrieves the message with a corresponding message ID from its conversation log, corrects the message, updates the conversation log, and activates an alert to notify a user of an update. If the message has not previously been sent, the messaging server corrects the message and sends the corrected message and the message ID to the recipient client system.

Abstract: A system, a computer readable medium and a method in a client-server environment, to manage a configuration of resources on client systems. This includes receiving one or more predetermined events along with one or more local run-time environmental conditions along with one or more user selectable settings. The events, the settings and the environmental conditions are previously set graphically using a graphical user interface with one or more user selectable selections therein on a server. These events, local run-time environmental conditions along with settings are delivered to a client system. A monitoring agent on the client system is used to detect when one or more predetermined events occur. When an event occurs, a test is made to determine if one or more local run-time environmental conditions are met, and if the conditions are met then the agent automatically applies one or more selectable configuration settings on the client system.

Abstract: An apparatus for creating therapeutic charge transfer in tissue includes a coil. The coil generates a changing magnetic field to induct an electric field in the tissue exceeding 10 mV/cm when the coil is 5 cm from the tissue. Preferably, the magnetic field has a growth phase and a decay phase and a duration of the growth phase is at least ten times a duration of the decay phase. The apparatus can include a control circuit to control a current fed to the coil. The control circuit includes two subcircuits and a switch for switching between a first of the subcircuits and a second of the subcircuits; preferably, a ? of the second subcircuit is at least ten times a ? of the first subcircuit. To generate the therapeutic effect, the coil should have a duty cycle of at least ten percent.

Abstract: A memory cell of the SRAM type is provided that is capable of storing one datum in a non-volatile manner. The memory cell includes two inverters (20 and 21) configured as a flip-flop for storing one bit. Each inverter includes a transistor (24 or 26) of a first type and a transistor (25 or 27) of a second type. The concentration of carriers in the conduction channel of the transistor (24) of the first type of one of the inverters (20) is different from the concentration of carriers in the conduction channel of the transistor (26) of the first type of the other inverter (21) so that the inverters have different threshold voltages.

Abstract: A method of forming an opening or cavity in a substrate, for receiving an electronic component, consists of or includes providing a patterned opaque masking layer on or adjacent a first major surface of the substrate, the masking layer having an opening overlying the position where the cavity is to be made, removing material from the substrate by laser ablation through the opening thereby forming an opening or cavity of a suitable size for receiving said electronic component.