Patents Represented by Law Firm Foley & Lardner, Schwartz, Mack, Blumenthal & Evans
  • Patent number: 4947816
    Abstract: An engine control system introduces a technology of assuming actually required fuel amount to be delivered to each engine cylinder at opening timing of an intake valve of the engine cylinder. In order to derive the assumed fuel demand, a basic fuel supply amount is derived on the basis of a basic fuel supply control parameter including an engine speed data and an intake air amount representative data, an air induction path area variation ratio data and a lag time data from derivation of the air induction path area variation ratio data to opening of the intake valve. The assumed fuel demand data can be used not only for controlling fuel supply but also for spark ignition timing control, air/fuel ratio control and so forth so that the engine operation control may precisely follow the actual engine driving condition for optimizing the engine performance.
    Type: Grant
    Filed: October 25, 1988
    Date of Patent: August 14, 1990
    Assignee: Japan Electronic Control Systems Company, Limited
    Inventors: Shinpei Nakaniwa, Naoki Tomisawa
  • Patent number: 4807112
    Abstract: A microcomputer provided with a direct memory access (DMA) controller comprises a central processing unit (CPU), which includes a CPU timing controller, an address computation section, and an address bus output buffer coupled between the output of the address computation section and an external address bus. The CPU also includes an auxiliary timing controller operative, in response to a hold request from a DMA controller, to output a HOLD acknowledge (HOLDA) signal to the DMA controller and to reset a BUS ENABLE signal to the address bus output buffer, so tha the CPU is isolated from the external address bus. The CPU further includes an address latch circuit connected between the output of the address computation section and the address bus output buffer to temporarily hold the address output in response to a latch signal from the auxiliary timing controller, so that the address output is supplied to the address bus immediately when the latch signal is reset at the termination of the DMA operation.
    Type: Grant
    Filed: October 11, 1985
    Date of Patent: February 21, 1989
    Assignee: NEC Corporation
    Inventor: Keiji Hamasaki