Abstract: Dual-band antennas that are embedded within portable devices such as laptop computers. In one aspect, a dual-band antenna for a portable device (e.g., laptop computer) includes a first element having a resonant frequency in a first frequency band and a second element having a resonant frequency in a second frequency band, wherein the first element is connected to a signal feed, wherein the second element is grounded, and wherein the first and second elements are integrated within a portable device.

Abstract: Rescue harness devices are designed for incorporation into protective coats of firefighter or other types of first responders such that when deployed, the rescue harness forms a closed loop that cinches around an upper torso region under the armpits of an individual donning the protective coat, to thereby positively secure the individual and pull directly on the individual's body.

Abstract: An antenna unit is provided with an inverted F-type antenna element provided with a feeding point and a ground connection point, and a non-feed antenna element configured so as to resonate with the inverted F-type antenna element through electrical coupling. In addition, the antenna unit may also be provided with a ground part which is grounded to the earth and connected to the ground connection point provided on one edge of the inverted F-type antenna element, and a resonance element, one edge of which is connected to the ground part, resonated by the non-feed antenna element through electrical coupling.

Abstract: Tool holder devices are provided, which are designed to hold tools having spring clip mechanisms. In one aspect, a tool holder device comprises a guiding portion and a mounting portion. The mounting portion is adapted to engage a spring clip of a tool for mounting the tool. The guiding portion is adapted to guide a spring clip towards the mounting portion as a person slides the tool from the guiding portion to the mounting portion while maintaining contact between the spring clip and the guiding portion.

Abstract: A system and method for implementing conversational protocols for distributed conversational networking architectures and/or distributed conversational applications, as well as real-time conversational computing between network-connected pervasive computing devices and/or servers over a computer network. The implementation of distributed conversational systems/applications according to the present invention is based, in part, on a suitably defined conversational coding, transport and control protocols. The control protocols include session control protocols, protocols for exchanging of speech meta-information, and speech engine remote control protocols.

Abstract: Systems and methods are provided for generating a language component vocabulary VC for a speech recognition system having a language vocabulary V of a plurality of word forms. One method for generating a language component vocabulary VC for a speech recognition system having a language vocabulary V of a plurality of word forms includes partitioning the language vocabulary V into subsets of word forms based on frequencies of occurrence of the respective word forms, in at least one the subsets, splitting word forms having frequencies less than a threshold to thereby generate word form components and generating a language component vocabulary VC including word forms and word form components. The resulting language component vocabulary, which includes word forms and word components, is used to generate a language model that can be efficiently implemented for real-time automatic speech recognition applications for languages with large vocabularies.

Abstract: Loadless 4T SRAM cells, and methods for operating such SRAM cells, which can provide highly integrated semiconductor memory devices while providing increased performance with respect to data stability and increased I/O speed for data access operations. A loadless 4T SRAM cell comprises a pair of access transistors and a pair of pull-down transistors, all of which are implemented as N-channel transistors (NFETs or NMOSFETS). The access transistors have lower threshold voltages than the pull-down transistors, which enables the SRAM cell to effectively maintain a logic “1” potential during standby. The pull-down transistors have larger channel widths as compared to the access transistors, which enables the SRAM cell to effectively maintain a logic “0” potential at a given storage node during a read operation.

Abstract: A method for constructing and publishing a plurality of objects, in accordance with the present invention, includes the steps of providing a plurality of fragments, constructing objects from the plurality of fragments, delaying publication of at least one of the objects, where the at least one of the objects includes at least one fragment belonging to a first class, to examine content, and publishing at least one of the objects including at least one of the fragments belonging to a second class without examining content. A program storage device for implementation of the present invention is also included.

Abstract: A display device and method for fabricating a liquid crystal cell are disclosed. A liquid crystal cell includes a first substrate, and a second substrate attached to the first substrate. The first substrate has a same thickness as the second substrate. The first substrate is lapped at a first rate while concurrently lapping the second substrate at a second rate, which is different from the first rate. The first substrate and the second substrate are thinned to different thicknesses. The thinner of the first and second substrates is provided on a viewer side of a collimate and post diffuse type liquid crystal cell to reduce depixelization.

Abstract: Data storage controllers employing lossless or lossy data compression and decompression to provide accelerated data storage and retrieval bandwidth. In one aspect, a data storage controller comprises a digital signal processor (DSP) comprising a data compression engine (DCE) for compressing data stored to the data storage device and for decompressing data retrieved from the data storage device; a programmable logic device, wherein the programmable logic device is programmed by the digital signal processor to instantiate a first interface for operatively interfacing the data storage controller to the data storage device and to instantiate a second interface for operatively interfacing the data storage controller to a host; and a non-volatile memory device, for storing logic code associated with the DSP, the first interface and the second interface.

Abstract: A method for fabricating a display device patterns a conductive layer on a display substrate and forms pixel electrodes on the display substrate. A plate is employed for carrying separately fabricated active devices to the display substrate. The separately fabricated devices are connected to the conductive layers and the pixel electrode.

Abstract: A method and apparatus for refreshing data in a dynamic random access memory (DRAM) cache memory in a computer system are provided to perform a data refresh operation without refresh penalty (e.g., delay in a processor). A data refresh operation is performed with respect to a DRAM cache memory by detecting a request address from a processor, stopping a normal refresh operation when the request address is detected, comparing the request address with TAG addresses stored in a TAG memory, generating refresh addresses to refresh data stored in the cache memory, each of which is generated based on an age of data corresponding to the refresh address, and performing a read/write operation on a wordline accessed by the request addresses and refreshing data on wordlines accessed by the refresh addresses, wherein the read/write operation and the refreshing of data are performed simultaneously.

Abstract: Methods for aiding in the diagnosis of dysautonomic disorders and dysautonomic conditions and methods for treating individuals diagnosed as having a dysautonomic disorder or a dysautonomic condition. In one aspect, a diagnosis method comprising analyzing a stool sample of an individual for the presence of a biological marker wherein the quantity of the biological marker is an indication of whether the invidual has, or can develop, a dysuatonic disorder or dysautonomic condition, as well as a therapuetic method for treating a dysautonomic disorder or dysautonomic condition by administration of, e.g., secretin, neuropeptides, peptides and/or digestive enzymes.

Abstract: A canine waste collection device comprising a handle and a frame member, connected to one end of the handle, wherein the frame member comprises a slotted member for insertably receiving and securing a portion of the disposable paper element, and wherein the frame member is configured for foldably receiving the disposable paper element to form a pouch for receiving waste.

Abstract: A light guide system has a light guide having a first end portion opposite a second end portion. The light guide provides a first surface and a second surface between the first and second end portions, and the second surface is inclined relative to the first surface. A light source is disposed along the first end portion on a first axis. A light redistribution device is disposed on an entrance of the light guide for receiving light from the light source and redistributing a portion of the light perpendicular to the first axis to provide a uniform light distribution from the first surface.

Abstract: A method of utilizing the chymotrypsin level of an individual as a measure of the success of secretin, other neuropeptides, and peptides or digestive enzyme administration to such individuals, and in particular, as a prognosticative of potential secretin, other neuropeptides, peptides, and digestive enzyme administration for persons having ADD, ADHD, Autism and other PDD related disorders.

Abstract: Systems and methods for providing fast and efficient data compression using a combination of content independent data compression and content dependent data compression. In one aspect, a method for compressing data comprises the steps of: analyzing a data block of an input data stream to identify a data type of the data block, the input data stream comprising a plurality of disparate data types; performing content dependent data compression on the data block, if the data type of the data block is identified; performing content independent data compression on the data block, if the data type of the data block is not identified.

Abstract: Systems and methods for providing accelerated data storage and retrieval utilizing lossless and/or lossy data compression and decompression. A data storage accelerator includes one or a plurality of high speed data compression encoders that are configured to simultaneously or sequentially losslessly or lossy compress data at a rate equivalent to or faster than the transmission rate of an input data stream. The compressed data is subsequently stored in a target memory or other storage device whose input data storage bandwidth is lower than the original input data stream bandwidth. Similarly, a data retrieval accelerator includes one or a plurality of high speed data decompression decoders that are configured to simultaneously or sequentially losslessly or lossy decompress data at a rate equivalent to or faster than the input data stream from the target memory or storage device. The decompressed data is then output at rate data that is greater than the output rate from the target memory or data storage device.

Abstract: Systems and methods for providing accelerated data storage and retrieval utilizing lossless data compression and decompression. A data storage accelerator includes one or a plurality of high speed data compression encoders that are configured to simultaneously or sequentially losslessly compress data at a rate equivalent to or faster than the transmission rate of an input data stream. The compressed data is subsequently stored in a target memory or other storage device whose input data storage bandwidth is lower than the original input data stream bandwidth. Similarly, a data retrieval accelerator includes one or a plurality of high speed data decompression decoders that are configured to simultaneously or sequentially losslessly decompress data at a rate equivalent to or faster than the input data stream from the target memory or storage device. The decompressed data is then output at rate data that is greater than the output rate from the target memory or data storage device.

Abstract: Systems and methods for providing lossless data compression and decompression are disclosed which exploit various characteristics of run-length encoding, parametric dictionary encoding, and bit packing to comprise an encoding/decoding process having an efficiency that is suitable for use in real-time lossless data compression and decompression applications.