Patents Represented by Attorney, Agent or Law Firm Frederick H.. Telecky, Jr.
  • Higher voltage drain extended MOS transistors with self-aligned channel and drain extensions
    Patent number: 6660603
    Abstract: An integrated circuit drain extension transistor. A transistor gate (72) is formed over a CMOS n-well region (10). A transistor source extension region (50), and drain extension region (52) are formed in the CMOS well region (10). A transistor region (90) is formed in the source extension region 50 and a transistor drain region 92 is formed between two drain alignment structures (74), (76) in the drain extension region (52).
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: December 9, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Jozef Czeslaw Mitros