Patents Represented by Law Firm Frishauf & Partners
  • Patent number: 4582565
    Abstract: A method of fabricating integrated semiconductor circuit devices with improved surface planarity. An oxidation-resistant masking layer is deposited over the surface of a semiconductor body and the walls of vertical trenches of a given width formed in the semiconductor body surface. The masking layer is removed in part from predetermined portions of the semiconductor body surface. A polycrystalline semiconductor material is deposited over the semiconductor body surface to bury the trenches, followed by continuous partial removal of the polycrystalline semiconductor material and the semiconductor body at portions corresponding to the predetermined portions of the semiconductor body surface to a predetermined surface level lower than the semiconductor body surface.
    Type: Grant
    Filed: August 8, 1984
    Date of Patent: April 15, 1986
    Assignee: Oki Electric Company Industry, Ltd.
    Inventor: Akira Kawakatsu
  • Patent number: D284230
    Type: Grant
    Filed: November 28, 1984
    Date of Patent: June 17, 1986
    Inventor: Alexis V. Kirk
  • Patent number: D284232
    Type: Grant
    Filed: December 21, 1984
    Date of Patent: June 17, 1986
    Assignee: Somersett Moon Ltd.
    Inventor: Alexis V. Kirk
  • Patent number: D284523
    Type: Grant
    Filed: December 14, 1984
    Date of Patent: July 8, 1986
    Assignee: Somersett Moon Ltd.
    Inventor: Alexis V. Kirk