Abstract: A display interface device 20 is provided which includes inputs for receiving video data words, the video data words including control codes for controlling the output format of a display, and a video clock signal received from an associated video controller. A first-in/first-out memory 30 is also provided with a video data word clocked into memory 30 by the first clock and clocked out of memory 30 by a second clock generated from a clock received from an associated graphics controller.

Abstract: A graphics and video controller 105 is provided which includes a dual aperture interface 206 for receiving words of graphics and video pixel data, each word of such data associated with an address directing that word to be processed as either graphics or video data. Circuitry 200, 201, 202, 207, 208 is provided for writing a word of the pixel data received from the interface 206 to a one of the on- and off-screen memory areas corresponding to the address associated with the received word. Circuitry 201, 202 is provided for selectively retrieving graphics and video data from the on-screen and off-screen memory areas. A first pipeline 205 is provided for processing data received from the on-screen area of frame buffer 107 while a second pipeline 204 is provided for processing data retrieved from the off-screen area of the frame buffer.

Abstract: A communications system includes at least two communications units, each communication unit including a transmitter capable of transmitting to the other unit on one or more frequencies, under the control of a mode control unit and wherein acquisition or a locking of frequencies of the two communications units and timing signal recovery is achieved by transmitting signals on a group of predetermined frequencies, the transmission on each frequency being for a predetermined time frame in a sequence which is repeated after n+1 time frames, wherein n is the number of different frequencies to be transmitted by the originating communications unit, and the receiving unit including a receiver operating on one of the predetermined frequencies for n+1 time frames until the receiving unit receives a signal from the originating unit and transmits an acknowledgment signal to the originating unit thus locking the two units on one of the predetermined frequencies such that information, transmission and reception can proceed

Abstract: Methods are provided for transferring a stream of video data from a video data source to a display interface unit 20. A video data word is clocked into a first-in-first-out memory 30 by a first clock and clocked out of memory 30 by a second clock generated from a clock received from an associated graphics controller.

Abstract: Circuitry 300 is disclosed for isolating faults in a path 304 transmitting data words each having at least one data bit and at least one parity bit. Circuitry 300 includes a plurality of exclusive-OR gates 303 each having a first input coupled to the data path 304 for receiving a bit of a one of the data words being transmitted along path 304. A plurality of multiplexers 305 are also provided, each multiplexer 305 including a first input coupled to an output of a corresponding one of the exclusive-OR gates 303 and a control signal input for receiving a control signal. A plurality of registers 306 have an input coupled to an output of a corresponding one of the multiplexers 305 and an output coupled to a second input of a corresponding one of the exclusive-OR gates 303 and a second input of the corresponding one of the multiplexers 305.