Patents Represented by Attorney Grahm S. Jones, II
  • Patent number: 5656546
    Abstract: A self-aligned TiN/TiSi.sub.2 formation using N.sub.2.sup.+ implantation during a two-step annealing Ti-salicidation process is provided. The leakage currents of n.sup.+ /p junction diodes fabricated using this technology were measured to investigate the phenomena of Al spiking into Si-substrate. The measured reverse-bias leakage current of diode per unit junction area with Al/TiN/TiSi.sub.2 contact is 1.2 nA/cm.sup.2 at -5 Volts, which is less than all of reported data. Also it can sustain the annealing process for 30 min at 500.degree. C. Thus, TiN formed with this technology process provides an effective barrier layer between TiSi.sub.2 and Al for submicron CMOS technology applications.
    Type: Grant
    Filed: August 28, 1995
    Date of Patent: August 12, 1997
    Assignee: Taiwan Semiconductor Manufacturing Company Ltd
    Inventors: Chii-Wen Chen, Mong-Song Liang