Abstract: An internal addressing structure for a semiconductor memory with at least two memory banks, includes a counter associated for operation with each memory bank and capable of generating sequences of digital codes for addressing locations in the corresponding bank, a first circuit for causing a selective updating of the counters, a second circuit for loading into the counters a common initial digital code, forming part of an initial address supplied to the memory from the outside through an addressing line bus, corresponding to an initial memory location, and a third circuit capable of detecting a first signal, supplied to the memory from the outside and indicating the presence of a digital code on the bus, to cause the common initial digital code to be loaded into the counters.

Abstract: An electrical connector includes a electrical connector extending between a pair of mechanical connectors to electrically couple circuits, and a supporting member between the mechanical connectors to reduce twisting of the electrical connector. The supporting member cambered to permit the mechanical connectors to translate with respect to one another. A clamping member includes a tapered clamping surface in an undeformed, unclamped position. The clamping member bends when in a clamped position, resulting in approximately planar clamping surface. Resilient pressure pads on the clamping members bias the electrical connector to the circuit board. The pressure pads are mounted in wells in the clamping members to support a sidewall of the pressure pads. Frames provide additional support to the sidewalls of the pressure pads. The pressure pads include a raised edge along a periphery of a contact surface of the pressure pad.

Abstract: The power supply device includes a DC-DC converter circuit having a power switch and a driving stage. The driving stage has a compensation terminal on which a compensation voltage is present, and which receives a biasing current. The driving stage includes a control circuit having an output terminal connected to a control terminal of the power switch and disconnection-detecting circuitry connected to the compensation terminal and generating a signal for permanent turning-off of the power switch when the biasing current drops below a current-threshold value. The driving stage moreover includes over-voltage detecting circuitry connected to the compensation terminal and generating a signal for temporary turning-off of the power switch when the compensation voltage exceeds a voltage-threshold value.