Patents Represented by Attorney Harrity & Snyder LLP
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Patent number: 7447678Abstract: A search engine may perform a search for a user search query over a number of possible search categories. For example, the search query may be performed for general web documents, images, and news documents. The search engine ranks categories based on the search query and/or the documents returned for each category and presents the search results to the user by category. Higher ranking categories may be presented more prominently than lower ranking categories.Type: GrantFiled: December 31, 2003Date of Patent: November 4, 2008Assignee: Google Inc.Inventors: Bret Taylor, Marissa Mayer, Orkut Buyukkokten
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Patent number: 7442046Abstract: A system includes a first electrical device including a conductive structure, and a second electrical device including an opening and a conductor provided in the opening. The conductor contacts the conductive structure of the first electrical device to electrically interconnect the first electrical device to the second electrical device.Type: GrantFiled: May 15, 2006Date of Patent: October 28, 2008Assignee: Sony Ericsson Mobile Communications ABInventors: Olof Simon Simonsson, Omid Kazemifar, Mikael Pär-Oskar Häll, Maiko Anneli Karlsson, H{dot over (a)}kan Klas Petersson
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Patent number: 7433369Abstract: In an ATM exchange, a cell transmission control section transmits an ATM cell to a transmission path of an ATM network. A traffic monitor monitors traffic of the cell transmissions. A statistical process section performs a temporal statistical process on the result of the traffic monitoring using a clock and a memory. A CAC produces an instruction for traffic control over a transmission terminal based on the result of the statistical process. A UPC controls traffic of a transmission path from the transmission terminal in accordance with the instruction.Type: GrantFiled: March 15, 2007Date of Patent: October 7, 2008Assignee: Juniper Networks, Inc.Inventor: Kazunori Shibasaki
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Patent number: 7432178Abstract: A method for performing a bit line implant is disclosed. The method includes forming a group of structures on an oxide-nitride-oxide stack of a semiconductor device. Each structure of the group of structures includes a polysilicon portion and a hard mask portion. A first structure of the group of structures is separated from a second structure of the group of structures by less than 100 nanometers. The method further includes using the first structure and the second structure to isolate a portion of the semiconductor device for the bit line implant.Type: GrantFiled: October 21, 2005Date of Patent: October 7, 2008Assignees: Advanced Micro Devices, Inc., Spansion LLCInventors: Angela T. Hui, Jean Yang, Yu Sun, Mark T. Ramsbey, Weidong Qian
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Patent number: 7432558Abstract: A semiconductor device may include a substrate and an insulating layer formed on the substrate. A fin may be formed on the insulating layer. The fin may include a side surface and a top surface, and the side surface may have a <100> orientation. A first gate may be formed on the insulating layer proximate to the side surface of the fin.Type: GrantFiled: June 9, 2004Date of Patent: October 7, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Shibly S. Ahmed, Judy Xilin An, Srikanteswara Dakshina-Murthy, Cyrus E. Tabery, Bin Yu
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Patent number: 7433228Abstract: A method is provided for programming a nonvolatile memory array including an array of memory cells, where each memory cell including a substrate, a control gate, a charge storage element having at least two charge storage areas for storing at least two independent charges, a source region and a drain region. The method includes designating at least one memory cell as a high-speed memory cell and pre-conditioning the high-speed memory cells by placing a first of the at least two charge storage areas into a programmed state, and subsequently enabling the programming on the second area with much higher rate.Type: GrantFiled: September 20, 2005Date of Patent: October 7, 2008Assignee: Spansion LLCInventors: Tiao-Hua Kuo, Nancy Leong, Hounien Chen, Sachit Chandra, Nian Yang
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Patent number: 7432557Abstract: A method for forming one or more FinFET devices includes forming a source region and a drain region in an oxide layer, where the oxide layer is disposed on a substrate, and etching the oxide layer between the source region and the drain region to form a group of oxide walls and channels for a first device. The method further includes depositing a connector material over the oxide walls and channels for the first device, forming a gate mask for the first device, removing the connector material from the channels, depositing channel material in the channels for the first device, forming a gate dielectric for first device over the channels, depositing a gate material over the gate dielectric for the first device, and patterning and etching the gate material to form at least one gate electrode for the first device.Type: GrantFiled: January 13, 2004Date of Patent: October 7, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Matthew S. Buynoski, Judy Xilin An, Bin Yu
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Patent number: 7423915Abstract: A non-volatile memory, such as a Flash memory, is configured to perform a random multi-page read operation. The memory may include a core array of non-volatile memory cells and input lines for receiving an indication of the random multi-page read operation. Further, the memory may include a multi-level volatile memory coupled to the core array that is configured to simultaneously process multiple pages of data from the core array in a pipelined manner. Output lines are coupled to the multi-level volatile memory and output the pages of data from the memory device.Type: GrantFiled: January 17, 2006Date of Patent: September 9, 2008Assignee: Spansion LLCInventors: Nancy Leong, Sachit Chandra, Hounien Chen
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Patent number: 7421651Abstract: A document may be segmented based on a visual model of the document. The visual model is determined according to an amount of visual white space or gaps that are in the document. In one implementation, the visual model is used to identify a hierarchical structure of the document, which may then be used to segment the document.Type: GrantFiled: December 30, 2004Date of Patent: September 2, 2008Assignee: Google Inc.Inventor: Daniel Egnor
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Patent number: 7421564Abstract: A centralized memory allocation system utilizes write pointer drift correction. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a reply that includes an address where the data unit is stored. The control logic receives the reply and determines whether the address in the reply differs from an address included in replies associated with other memory controllers by a given address range. When this occurs, the control logic performs a corrective action to bring an address associated with the memory controller back within a defined range.Type: GrantFiled: February 17, 2006Date of Patent: September 2, 2008Assignee: Juniper Networks, Inc.Inventors: Rami Rahim, Pradeep Sindhu, Raymond Marcelino Manese Lim, Sreeram Veeragandham, David Skinner
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Patent number: 7421432Abstract: A system facilitates a search by a user. The system detects selection of one or more words in a document currently accessed by the user, generates a search query using the selected word(s), and retrieves a document based on the search query. When the document includes one or more links corresponding to a linked document, the system analyzes each of the links, prefetches the linked documents corresponding to a number of the links, and presents the document to the user. The system receives selection of one of the links and retrieves the linked document corresponding to the selected link. The system identifies one or more pieces of information in the retrieved document, determines a link to a related document for each of the identified pieces of information, and provides the determined links with the related document to the user.Type: GrantFiled: December 13, 2000Date of Patent: September 2, 2008Assignee: Google Inc.Inventors: Urs Hoelzle, Monika H. Henzinger, Lawrence E. Page
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Patent number: 7420987Abstract: An arbiter performs arbitration over a plurality of queues and provides data to a plurality of mutually exclusive destinations using combination logic that logically combines a plurality of mutually exclusive vectors into a combination vector. Each of the mutually exclusive vectors corresponds to one of the plurality of mutually exclusive destinations. A number of vector arbiters perform arbitration on each mutually exclusive vector to select a position within the mutually exclusive vector. A combination arbiter performs arbitration on the combination vector to determine a position within the combination vector, which corresponds to the next queue to be serviced. A comparison element compares the position within a mutually exclusive vector and the position within the combination vector to determine the destination of the data within the next queue to be serviced.Type: GrantFiled: July 25, 2002Date of Patent: September 2, 2008Assignee: Juniper Networks, Inc.Inventors: Debashis Basu, Edwin Su
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Patent number: 7416925Abstract: A semiconductor device includes a substrate and an insulating layer on the substrate. The semiconductor device also includes a fin structure formed on the insulating layer, where the fin structure includes first and second side surfaces, a dielectric layer formed on the first and second side surfaces of the fin structure, a first gate electrode formed adjacent the dielectric layer on the first side surface of the fin structure, a second gate electrode formed adjacent the dielectric layer on the second side surface of the fin structure, and a doped structure formed on an upper surface of the fin structure in the channel region of the semiconductor device.Type: GrantFiled: February 21, 2007Date of Patent: August 26, 2008Assignee: Advanced Micro Devices, Inc.Inventors: Ming-Ren Lin, Bin Yu
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Patent number: 7414852Abstract: A chassis shelf may include an upper guide adapted to receive a first edge of a first card and a lower guide adapted to receive a first edge of a second card. The chassis shelf may include an alignment device adapted to align the chassis shelf with respect to a chassis. The chassis shelf may include an attachment device for removably coupling the chassis shelf to the chassis.Type: GrantFiled: June 1, 2005Date of Patent: August 19, 2008Assignee: Juniper Networks, Inc.Inventor: Christopher J. Otte
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Patent number: 7415533Abstract: A switch fabric includes input links, output links, and at least one switching element. The input links are configured to receive data items that include destination addresses. At least some of the data items have different priority levels. The output links are configured to output the data items. Each of the output links is assigned multiple ones of the destination addresses. Each of the destination addresses corresponds to one of the priority levels. The switching element(s) is/are configured to receive the data items from the input links and send the data items to ones of the output links without regard to the priority levels of the data items.Type: GrantFiled: January 5, 2007Date of Patent: August 19, 2008Assignee: Juniper Networks, Inc.Inventors: Philippe Lacroute, Matthew A. Tucker
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Patent number: 7411910Abstract: A system automatically provisions a data flow. The system provides a flow range. The system receives a data unit associated with an unprovisioned data flow, determines whether the unprovisioned data flow falls within the flow range, and creates an automatically provisioned data flow based on the unprovisioned data flow when the unprovisioned data flow falls within the flow range.Type: GrantFiled: July 6, 2004Date of Patent: August 12, 2008Assignee: Juniper Networks, Inc.Inventors: Craig Frink, John B. Kenney, Russell Heyda, Albert E. Patnaude, Jr.
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Patent number: 7409447Abstract: Systems and methods are provided for analyzing policy rules defined for a subscriber and determining packet treatment in a network. Definitions are retrieved pertaining to policy rules for a subscriber. At least one policy point in a network is determined based on the retrieved definitions. The packet treatment is determined at each of the at least one policy point. The packet treatment is shown for each of the at least one policy point. Packets may be injected into the network at injection points and statistics may be collected. The statistics may be compared with results of analyzing policy rules for the subscriber.Type: GrantFiled: November 20, 2003Date of Patent: August 5, 2008Assignee: Juniper Networks, Inc.Inventor: Alireza Assadzadeh
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Patent number: 7409383Abstract: A stopword detection component detects stopwords (also stop-phrases) in search queries input to keyword-based information retrieval systems. Potential stopwords are initially identified by comparing the terms in the search query to a list of known stopwords. Context data is then retrieved based on the search query and the identified stopwords. In one implementation, the context data includes documents retrieved from a document index. In another implementation, the context data includes categories relevant to the search query. Sets of retrieved context data are compared to one another to determine if they are substantially similar. If the sets of context data are substantially similar, this fact may be used to infer that the removal of the potential stopword(s) is not material to the search. If the sets of context data are not substantially similar, the potential stopword can be considered material to the search and should not be removed from the query.Type: GrantFiled: March 31, 2004Date of Patent: August 5, 2008Assignee: Google Inc.Inventors: Simon Tong, Uri Lerner, Amit Singhal, Paul Haahr, Steven Baker
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Patent number: 7406089Abstract: A system processes packets in a network device and includes a memory for buffering the packets. The memory may store the packets in memory in data cells. To expedite packet processing, portions of the packet are extracted and placed in a notification, which is then used for packet processing operations, such as route lookup, policing, and accounting. The notification may also include address elements, such as address offsets, that define the locations of the data cells in memory. The address elements can be used to read the data cells from the memory when packet processing is done. If the notification cannot hold all the address elements, additional cells, indirect cells, are created for holding the remaining address elements. The indirect cells are formed in a linked list. The notification contains an address element. To prevent reading incorrect indirect cells, each indirect cell is written with a signature that is created based on the notification.Type: GrantFiled: July 31, 2002Date of Patent: July 29, 2008Assignee: Juniper Networks, Inc.Inventors: Rami Rahim, Pradeep Sindhu
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Patent number: 7406087Abstract: A network device includes an interface (105), a TCP/IP protocol fast processing path (115), and a TCP/IP protocol slow processing path (110). The interface (105) receives a packet and parses the packets to determine a characteristic of the packet. The TCP/IP protocol fast processing path (115) processes the packet if the characteristic of the packet includes a first characteristic. The TCP/IP protocol slow processing path (110) processes the packet if the characteristic of the packet includes a second characteristic.Type: GrantFiled: November 8, 2002Date of Patent: July 29, 2008Assignee: Juniper Networks, Inc.Inventors: Nhon T. Quach, Ramesh Padmanabhan, Jean Marc Frailong