Abstract: An epitaxial composite comprising a thin film of single crystal Group III-V wide band-gap compound semiconductor or semiconductor alloy on single crystal, electrically insulating oxide substrates such as sapphire, spinel, BeO, ThO.sub.2, or the like, and on III-V semiconductors or alloys. The thin film may be produced in situ on a heated substrate by reaction of an organic compound containing the Group III constituent, typically the alkyl metal organic, such as trimethylgallium and/or triethylgallium with a Group V hydride such as arsine, phosphine and/or stibine.

Abstract: A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices and for both diffused conducting lines in the substrate and polysilicon conducting lines situated on isolating field oxide formed on the substrate. Mask alignment tolerances are increased and rendered non-critical. The use of materials in successive layers having different etch characteristics permits selective oxidation of desired portions only of the structure without need for masking and removal of selected material from desired locations by batch removal processes again without use of masking. There results VLSI circuits having increased density and reliability.

Abstract: A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices and for diffused conducting lines in the substrate. Mask alignment tolerances are increased and rendered non-critical. The use of materials in successive layers having oxidation and etch characteristics permits selective oxidation of desired portions only of the structure without need for masking, and removal of selected material from desired locations by batch removal processes again without use of masking. There results semiconductor devices of minimum geometry with selective interconnection capabilities, affording VLSI circuits having increased density with improved yield and reliability.

Abstract: A method of fabricating very large scale integrated circuits including N-channel silicon gate nonvolatile memory elements and additional peripheral transistor elements. The nonvolatile memory elements are fabricated as PDS protected drain-source devices composed of a variable threshold memory device having a thin silicon dioxide gate insulator in combination with a pair of fixed threshold devices having a thicker silicon dioxide gate insulator arranged with a common silicon nitride layer and common gate electrode. The additional fixed threshold peripheral transistors are fabricated without a silicon nitride layer. In addition, the method contains no processing steps subsequent to the fabrication of the PDS devices which necessitate the application of temperatures in excess of 900.degree. C.

Abstract: A CCD imager for extracting the spectral information from impinging photons and having a multiple photon collection structure through which protons must serially traverse. The carriers generated by the impinging photons are collected by two or more collection regions in each resolution element and the ratio of the relative responses of each of the collection regions can be used to derive spectral information. The CCD imager is fabricated such that both the holes and the electrons generated by the impinging photons are collected, detected, stored, and transferred. Furthermore, the collection of both the holes and the electrons generated by the impinging photons in the CCD imager enables the generation of spectral information without degradation of detector quantum efficiency and can further enable the generation of complete spectral information when used to detect impinging photons comprising mono-energetic optical signals.

Abstract: A process for producing VLSI (very large scale integrated) circuits employs techniques of self-aligned gates and contacts for FET devices and for both diffused conducting lines in the substrate and polysilicon conducting lines situated on isolating field oxide formed on the substrate. Mask alignment tolerances are increased and rendered non-critical. The use of materials in successive layers having different etch characteristics permits selective oxidation of only desired portions of the structure without need for masking and removal of selected material from desired locations by batch removal processes again without use of masking. There results VLSI circuits having increased density and reliabilty. The process allows the simultaneous doping of two or more regions resulting in uniformity of device characteristics.