Abstract: The circuit configuration captures the load current of a field effect-controllable power semiconductor component. The drain and gate terminals of a further field effect-controllable semiconductor component are connected to the drain and gate terminals, respectively, of the first semiconductor component. A fraction of the load current flows through the further semiconductor component. The load current of the further semiconductor component is set as a function of the drain-to-source voltage of the two semiconductor components. The load current flowing through the further semiconductor component is compared with a reference current and an output signal is generated if the load current falls below a set value.