Abstract: A transition detector that samples a signal under test only at discrete times determined by a clock signal. By sampling only in discrete intervals instead of continuously, this circuit has a greatly reduced sensitivity to spurious transitions produced by noise in the signal under test. This detector produces an output signal having a narrow pulse at each detected transition.
Abstract: An anti-fuse structure characterized by a substrate, an oxide layer formed over the substrate having an opening formed therein, an amorphous silicon material disposed within the opening and contacting the substrate, and oxide spacers lining the walls of a recess formed within the amorphous silicon. The spacers prevent failures of the anti-fuse structures by covering cusps formed in the amorphous silicon material. The method of the present invention forms the above-described anti-fuse structure and further solves the problem of removing unwanted spacer material from areas outside of the anti-fuse structure locations.
Type:
Grant
Filed:
June 4, 1991
Date of Patent:
June 9, 1992
Assignee:
VLSI Technology, Inc.
Inventors:
William J. Boardman, David P. Chan, Kuang-Yeh Chang, Calvin T. Gabriel, Vivek Jain, Subhash R. Nariani
Abstract: A buffer characterized by a pull-up network and a pull-down network which are both coupled between an input and an output of the buffer. Each of the networks include a number of switch elements which can be sequentially turned on or off by means of an RC network to provide slew-rate control for the buffer. Preferably, each of the networks are associated with diode bypass networks to reduce crowbar current. In operation, both the pull-up network and the pull-down network turn on slowly but turn off very quickly due to the diode bypass networks.
Type:
Grant
Filed:
March 5, 1991
Date of Patent:
May 5, 1992
Assignee:
VLSI Technology, Inc.
Inventors:
Thomas V. Ferry, Jamil Kawa, Kerry M. Pierce, William G. Walker, Michael A. Zampaglione