Abstract: A split folding handle hatchet is disclosed that in a first position can be used as a hatchet and in a second position can be used as an Eskimo ulu-type of scraper. The hatchet shank is securely held by unique raised surfaces on the inside of each handle portion when the handle is gripped by the woodsman.

Abstract: A novel centrifugal device that attaches to multiple rotating cross-vanes in a rotary engine so as to offset the effects of centrifugal forces on the cross-vanes and thereby reduce seal element wear on the cross-vanes. The device consists of two clevis arms and a weight arm pivotally pinned to each end of the rotating cross-vanes.

Abstract: A method for fabricating submicron lines over a semiconductor material by creating a narrow hard mask over the material using a narrow void-producing process. The narrow void is thus used as a mask to form lines that are narrower than those that can be produced by current lithography techniques. The method can also be used to create sharp emission tips for field effect display devices.

Abstract: A compartmentized hairbrush is disclosed having a cavity in the handle for lipstick, a pair of cavities in the body for makeup tools and a third cavity in the body for cosmetic products. The cosmetic products are within an interchangeable cartridge(s) having a groove on the bottom that engages a mating tongue in the body cavity to retain the cartridge(s) in the cavity.

Abstract: A compact cosmetic center that houses cosmetic products needed to do a complete makeup application. This center securely stores replaceable cosmetic cartridges, tubes, and tools to allow the consumer hands-free use while in a stationary, upright position or when in motion, i.e., in an automobile, boat, plane. This is possible by use of suction cups attaching to nonporous surfaces or by the use of an adjustable clip for use on a desk top or car visor.

Abstract: A small, portable, non-intrusive device that detects the occurrence of an electrostatic discharge (ESD) during the handling, transporting, and testing of static sensitive electronic parts. It can be used to locate grounding problems in assembly equipment and is useful during repairs and assembly of electronic equipment. A preferred use is in the manufacture of semiconductor devices and the equipment containing these devices which are sensitive to ESD occurrences.

Abstract: Processes for fabrication of: an N-channel raised source/drain MOSFET transistor; an N-channel and P-channel raised source/drain MOSFET device; and an N-channel raised source/drain MOSFET in conjunction with a DRAM memory cell capacitor. The process deposits a layer of titanium nitride over the N-channel and P-channel source/drain areas which acts as a barrier to phosphorus or boron atom outdiffusion so that the junction doping levels remain low in the source/ drain areas, and N-channel and P-channel junctions will be shallow. The titanium nitride layer will serve as a dopant atom barrier in a capacitor storage node, an N-channel source/drain area, and a P-channel source/drain area.

Abstract: A dough-processing system for dividing a dough sheet into multiple separate portions and transporting each portion in a predetermined direction. A rotary cutter, having a multiplicity of cutting dies affixed thereon, divides the dough sheet. The cutting dies have an exterior peripheral cutting edge for cutting the linear dough sheet into two or more linear portions for further processing on standard conveyor systems and an interior peripheral cutting edge for cutting an interior portion from the snack-piece dough. The rotary cutter includes an internal helical auger rigidly affixed to an external cylindrical mandrill having first and second ends and having a multiplicity of cutting dies affixed thereon. The rotary cutter has an ever-increasing diameter funnel path for transporting the interior cut portion of the snack-piece dough into the interior of the rotary cutter and thereupon the helical auger transports it out to the side of the rotary cutter.

Abstract: A multiple stacked die device is disclosed that contains up to four dies and does not exceed the height of current single die packages. Close-tolerance stacking is made possible by a low-loop-profile wire-bonding operation and thin-adhesive layer between the stacked dies.

Abstract: A releasable restraining device suitable for use with saddle-type seats for horses, motor vehicles, or other forms of locomotion. The releasable restraining device includes a toroidal, semicircular, or elliptical doughnut-shaped rubber bladder or other suitable material for circumventing the rider and attachments for securing the rider's lower extremities to the saddle, thereby allowing his upper torso to be free to manipulate the vehicle or the reins of a horse.

Abstract: A device and a method of forming a floating gate memory transistor of very small area, thereby allowing a high-density integrated circuit chip, more specifically for Erasable Programmable Read-Only Memory (EPROM) or similar non-volatile devices.In a first embodiment, a method is disclosed that fabricates a programmable memory cell described as a "diffusion cut" cell where a plug-type floating gate contact hole cuts through a diffusion region and partially into a substrate region. In a second embodiment, a method is disclosed that fabricates a programmable memory cell described as an "oxide cut" cell, where the plug-type floating gate contact hole only penetrates a silicon oxide layer. This "oxide cut" cell is formed in a similar fashion except penetration does not go into the diffusion region or substrate.

Abstract: A programmable read-only memory device and method of fabrication are disclosed having an antifuse in the drain node of a field effect transistor. Programming is accomplished by imposing a high voltage on the transistor drain and gate which causes the antifuse to be a closed circuit; otherwise, the transistor appears as an open circuit. Locating the antifuse in the drain node as opposed to the source node avoids problems of source reverse bias.

Abstract: A submicron-width fuse element is disclosed that protects peripheral DRAM chip devices from low current failures below the range of metal fuse elements. In a specific application, the fuse elements are used to protect a DRAM chip from dielectric failure of voltage supply filtering capacitors. A low cross-section and length allows minimum space for the element.

Abstract: A multiple orifice spray nozzle having reversible orifice cleaning capability for use with high pressure liquid spraying systems. A first embodiment offers selection of a first or second orifice by vertical movement of an orifice selection cylinder. A second embodiment offers selection of a first or second orifice by rotation of the orifice selection cylinder about a vertical axis.

Abstract: An apparatus and method of performing a calibration of the accuracy of placement of semiconductor chips or devices by a pick-and-place machine. The chips are placed on an adhesive-backed glass plate that has calibrated etch marks whose dimensions are chosen to aid the inspector in estimating, or carefully measuring in an optic comparator, the amount of placement error that the machine is causing. The calibration would be performed on a periodic basis as a preventive maintenance program.

Abstract: An apparatus and method of automatically performing a calibration of the accuracy of placement of semiconductor chips or devices by a pick-and-place machine. The parts are placed on an adhesive-backed glass plate that has calibrated black marks whose dimensions match those of a specific part lead footprint. A gray scale camera mounted on the machine above the inverted glass plate records and sends a signal to a machine computer identifying the coordinates of exposed part silver lead area. The computer calculates part placement error and sends error data to a CRT or camera screen and alarm to alert an operator.

Abstract: A unique method of testing an integrated circuit DRAM for incorrect stored data is disclosed. A JEDEC test mode entry is initiated by normal means, i.e., Write Enable (WE*) and Column Address Select (CAS*) before Row Address Select (RAS*) with specific address data to select a specific test. Data bits are then loaded in the DRAM cells and column data bits compared. The subarray bits are also compared with bits in an expected data register which has been loaded at the beginning of the read cycle. If column bits match and subarray bits match the expected data register, ones are indicated on the data (out) bus; otherwise, a zero appears in case of a data error.