Patents Represented by Attorney Infineon Techn. AG
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Patent number: 8351464Abstract: In one implementation, a transmission apparatus includes a protocol stack for a DSL transmission system, the protocol stack includes a retransmission functionality, the retransmission functionality being provided between a sublayer of a TPS-TC layer and a data link layer, the retransmission functionality having a fragment of a packet or a group of fragments of a packet as basic retransmission unit. The protocol stack may implement a service specific retransmission functionality such that for a first class of services retransmission protection is provided and for a second class of services no retransmission protection is implemented.Type: GrantFiled: September 12, 2008Date of Patent: January 8, 2013Assignee: Infineon Technologies AGInventors: Bernd Heise, Michael Horvat, Gert Schedelbeck, Dietmar Schoppmeier
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Patent number: 8338251Abstract: One or more embodiments of the invention relate to a method comprising: treating a fin of a first n-channel access transistor in a static random access memory cell to have a lower charge carrier mobility than a fin of a first n-channel pull-down transistor in a first inverter in the memory cell, the first n-channel access transistor being coupled between a first bit line and a first node of the first inverter; and treating a fin of a second n-channel access transistor in the memory cell to have a lower charge carrier mobility than a fin of a second n-channel pull-down transistor in a second inverter in the memory cell, the second n-channel access transistor being coupled between a second bit line and a second node of the second inverter.Type: GrantFiled: May 16, 2012Date of Patent: December 25, 2012Assignee: Infineon Technologies AGInventors: Joerg Berthold, Christian Pacha, Klaus von Arnim
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Patent number: 8331166Abstract: A method and a system for reading from memory cells in a memory device are provided. In one embodiment, the memory device comprises a first plurality of data lines and a second plurality of data lines, at least one first multiplexer coupled to the first plurality of data lines and at least one low reference line, at least one second multiplexer coupled to the second plurality of data lines and at least one high reference line, at least one third multiplexer coupled to the at least one first multiplexer and the at least one second multiplexer, and a reference memory cell coupled to the at least one third multiplexer and at least one sense amplifier.Type: GrantFiled: February 28, 2011Date of Patent: December 11, 2012Assignee: Infineon Techn. AGInventors: Cyrille Dray, Alexandre Ney
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Patent number: 8330274Abstract: One or more embodiments relate to a method of forming a semiconductor structure, comprising: providing a workpiece; forming a barrier layer over the workpiece; forming a seed layer over the barrier layer; forming an inhibitor layer over the seed layer; removing a portion of said inhibitor layer to expose a portion of the seed layer; and selectively depositing a fill layer on the exposed seed layer.Type: GrantFiled: September 29, 2010Date of Patent: December 11, 2012Assignee: Infineon Technologies AGInventors: Hans-Joachim Barth, Gottfried Beer, Joern Plagmann, Jens Pohl, Werner Robl, Rainer Steiner, Mathias Vaupel
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Patent number: 8315024Abstract: Implementations are presented herein that include an electrostatic discharge (ESD) protection circuit. The ESD protection circuit includes a first transistor and a second transistor. The first transistor has a first terminal that is coupled to a first supply line and a bulk that is coupled to a second supply line. The second transistor has a first terminal that is coupled to the second supply line, a bulk that is coupled to the first supply line and a second terminal that is coupled to a second terminal of the first transistor to define a protected node. The ESD protection circuit further includes a current limiting element that has a first terminal that is coupled to the protected node.Type: GrantFiled: September 16, 2009Date of Patent: November 20, 2012Assignee: Infineon Technologies AGInventors: Christian Russ, Wolfgang Soldner, Gernot Langguth, David Alvarez, Krysztof Domanski
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Patent number: 8245565Abstract: An embodiment of the present invention is a transport and storage system for a slurry comprising: a main container; and a test container, the main container and the test container being exposed to the same environmental conditions, the main container and the test container containing a slurry from the same batch, wherein the test container is designed to determine the viscosity of the slurry.Type: GrantFiled: June 3, 2008Date of Patent: August 21, 2012Assignee: Infineon Technologies AGInventor: Stefan Geyer
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Patent number: 8199560Abstract: One or more embodiments relate to a memory device, comprising: a substrate; a gate stack disposed over the substrate, the gate stack comprising a control gate disposed over a charge storage layer; and a spacer select gate disposed over the substrate and laterally disposed from the gate stack, the select gate comprising a carbon allotrope.Type: GrantFiled: June 9, 2011Date of Patent: June 12, 2012Assignee: Infineon Technologies AGInventors: Ronald Kakoschke, Harald Seidl
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Patent number: 8183636Abstract: One or more embodiments relate to a static random access memory cell comprising: a first inverter including a first n-channel pull-down transistor coupled between a first node and a ground voltage; a second inverter including a second n-channel pull-down transistor coupled between a second node and the ground voltage; a first n-channel access transistor coupled between a first bit line and the first node of the first inverter, a fin of the first n-channel access transistor having a lower charge carrier mobility than a fin of the first n-channel pull-down transistor; and a second n-channel access transistor coupled between a second bit line and the second node of the second inverter, a fin of the second n-channel access transistor having a lower charge carrier mobility than a fin of the second n-channel pull-down transistor.Type: GrantFiled: March 28, 2011Date of Patent: May 22, 2012Assignee: Infineon Technologies AGInventors: Joerg Berthold, Christian Pacha, Klaus Arnim Von
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Patent number: 8183120Abstract: One or more embodiments relate to a method, comprising forming an implant on a substrate surface; selectively etching the wafer surface to form an elongated fin including portion of the implant; forming collector/emitter regions adjacent opposing ends of the fin; and forming a base region intermediate the collector/emitter regions.Type: GrantFiled: November 10, 2010Date of Patent: May 22, 2012Assignee: Infineon Technologies AGInventors: Ronald Kakoschke, Klaus Schruefer
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Patent number: 8148257Abstract: One or more embodiments relate to a method of forming an electronic device, comprising: providing a workpiece; forming a first barrier layer over the workpiece; forming an intermediate conductive layer over the first barrier layer; forming a second barrier layer over the intermediate conductive layer; forming a seed layer over the second barrier layer; removing a portion of the seed layer to leave a remaining portion of the seed layer and to expose a portion of the second barrier layer; and electroplating a fill layer on the remaining portion of the seed layer.Type: GrantFiled: September 30, 2010Date of Patent: April 3, 2012Assignee: Infineon Technologies AGInventors: Hans-Joachim Barth, Gottfried Beer, Joern Plagmann, Jens Pohl, Werner Robl, Rainer Steiner, Mathias Vaupel
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Patent number: 8067808Abstract: A memory cell includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.Type: GrantFiled: May 21, 2010Date of Patent: November 29, 2011Assignee: Infineon Technologies AGInventors: Ronald Kakoschke, Klaus Schruefer
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Patent number: 7973358Abstract: One or more embodiments relate to a semiconductor device, comprising: a substrate; and a radio frequency coupler including a first coupling element and a second coupling element spacedly disposed from the first coupling element, the first coupling element including at least one through-substrate via disposed in the substrate, the second coupling element including at least one through-substrate via disposed in the substrate.Type: GrantFiled: August 7, 2008Date of Patent: July 5, 2011Assignee: Infineon Technologies AGInventors: Andre Hanke, Oliver Nagy