Abstract: A tray for testing and storage of photovoltaic e.g. solar cells, is described, enabling processing or testing of such cells to be conducted while supported on the tray. The tray comprises a base having a peripheral rim extending upwardly around the upper surface of the base, and serving to at least partially retain one or more of the cells within a pre-defined position on the upper surface. One or more indexing elements are provided on the upper surface of the tray to co-operate with the peripheral rim to define a number of pre-defined cell positions on the upper surface of the tray, for selectively retaining any of a plurality of different sized cells. A vacuum chamber is provided to retain the solar cell in its pre-defined position on the tray. Apertures are provided in the base of the tray and extend to the pre-defined cell positions to permit probes to extend therethrough and into contact with the solar cell.

Abstract: Memory circuits having a floating gate transistor as a non-volatile storage element are constructed with a shunt transistor across the floating-gate transistor which in the event of a short circuit between the floating gate and the transistor substrate causes the memory to go into a predetermined fail-safe condition. The circuits are cross-coupled flip-flops with a driver and a complementary driver or load connected in series in each of the circuits, one driver or complementary driver or load being a floating gate transistor such as a FATMOS. Short circuiting of the floating gate to the control gate of the floating-gate transistor gives the same fail-safe condition.

Abstract: A buffer is provided for protecting the electron beam collector of a traveling wave tube. The collector comprises an elongated tubular wall, an elongated tubular insulating wall of one type of material, an elongated cylindrical electrode of another type of material coaxially positioned within the insulating wall, and the buffer interposed between the electrode and the insulating wall. The buffer comprises a continuous web of buffer material capable of being bonded to dissimilar insulating wall material and electrode material. The web having an alternating pattern of corrugations, the vertices of the corrugations are generally planar which define two generally parallel, planar surfaces which in turn are adapted for bonding to the insulating wall and the electrode.

Abstract: There is herein described a process for fabricating GaAs FETs with an ion implanted channel layer wherein an ion implanted substrate is capless annealed under an arsine overpressure, and a relatively shallow portion of the outer surface of the substrate in the active layer is removed for the deposition of a gate metallic electrode.

Abstract: An electrically erasable programmable read-only memory, comprising a plurality of floating gate tunneling metal oxide semiconductor field effect transistors, does not require an addressing transistor in each cell. Instead, the gate decoder applies a sufficiently negative gate voltage to unselected ones of the transistors so that they are turned off regardless of the amount of charge on their floating polysilicon gates. Writing and erasure of data is performed without disturbing data in memory cells not selected for writing or erasure despite the absence of a series connected addressing transistor.

Abstract: A non-volatile semiconductor latch having at least one variable threshold FATMOS transistor in the cross-coupled latch branches. To accomplish non-volatile reading, the latch nodes (X.sub.1, X.sub.2) are briefly precharged positively so that when the precharging ends and the nodes descend towards the negative supply voltage, the FATMOS(s), by virtue of their varied thresholds, place the latch in its correct logic state dictated by an earlier non-volatile write operation. Precharging, by means of transistors Q.sub.7, Q.sub.8 in parallel with the complementary drivers or loads, and transistors Q.sub.9, Q.sub.10 in series with the drivers in the latch, negates the capacitive effects which can otherwise cause unpredictable non-volatile reading. It also enables non-volatile reading to occur independently from power switch-on--which was necessary with earlier non-volatile FATMOS-containing latches.

Abstract: A lightweight microwave filter device is disclosed which utilizes a housing made of a lightweight metal such as aluminum having a relatively large coefficient of thermal expansion. The microwave filter also utilizes resonator elements which are either interdigital or in a comb-line filter arrangement. The resonator rods are made in two segments -- a lightweight metal such as aluminum having a relatively large coefficient of thermal expansion and a metal having a very low coefficient of thermal expansion such as invar. As the temperature varies the length of the rod also varies. The tuning capacitance between the rods and the housing varies with temperature changes and compensates for the change in the rod length. Thus the resonant frequency of the microwave filter is maintained relatively constant over a predetermined temperature range.