Abstract: A programmable device for signal processing applications in which short loops of digital data are processed repetitively and in parallel. The device consist of five independently programmable subsystems whose functions are able to operate simultaneously. The apparatus is intended for use in a connection with a digital multiplier device and a digital memory device for such signal processing applications as fast Fourier transforms and time domain filtering in real time or near real time. The five parallel functions are1. to move data in and out of an external memory device between selected registers;2. to move data in and out of an external multiplier between selected registers and an arithmetic logic unit (ALU);3. to move data from the output of a multiplier to selected registers and to the ALU;4. to propagate data selectively through a chain of registers, the chain being of preselectable length; and5. to perform selected arithmetic and logic operations.

Abstract: An apparatus and method for generating a specific sequence of addresses of values of an array stored in a digital memory. The addresses are generated by a first counter which generates a seed value and a second counter which generates a control value, the control value controlling a bit inserter and a programmable shifter to set, respectively, the bit place position of bit insertion and the amount of shift. The output of the bit inserter is the row position of related addresses for butterfly operation of a fast Fourier transform array. The output of the shifter is the address of coefficients associated with the complex rotation of the butterfly operation. The apparatus is an integrated circuit intended for use as a modular integrated circuit in connection with digital memory means and central processing means including a digital multiplying means.

Abstract: In the process of manufacturing integrated circuits, the steps of forming a layer of polysilicon, in which a dopant will be implanted, over an oxide mask having suitable windows to define zones of one conductivity type to be formed in a substrate of another conductivity type, driving the dopant from the polysilicon layer into the substrate to form the zones in the substrate, oxidizing the polysilicon layer so that the oxidized polysilicon layer and the mask become an integral layer, and then removing the integrated oxide layer. Thereafter, other layers may be formed on the substrate.

Abstract: In the disclosed method, a protective film is attached to an integrated circuit by the steps of placing a droplet of an adhesive on the surface of the integrated circuit; dropping the film on the droplet of adhesive; squeezing the droplet into a layer with the weight of the film; and aligning corresponding edges of the film and integrated circuit via the surface tension in the adhesive.

Abstract: A plurality of CML integrated circuit chips with input and output gates connected in a circular access linkage loop output-to-input with each chip having an interface mechanism comprising an interface register and a bypass arrangement between the input gate and the output gate so that information may flow from a transmitter output gate to a receiver input gate uni-directionally, (clockwise or counter-clockwise) through the loop by means of the bypass with minimal delay.Utilizing this circular access linkage loop together with a junction box, a number of access loops can be joined together to increase the number of chips which can be linked together.Also disclosed is a multiplexing scheme utilizing the circular access linkage loop for increasing the gate per pin ratio and for higher speed communication between chips.

Abstract: The disclosed system connector is comprised of a frame that is adapted to receive an integrated circuit package such that electrical conductors in the frame align with corresponding electrical conductors in the integrated circuit package. A pivotal member, connected to the frame, replaceably secures the integrated circuit package to the frame and presses the aligned electrical conductors together. This pivotal member has a latching portion that follows tracks in the frame to press and latch the aligned electrical conductors together, and has a lever portion that pivots the latching portion along the tracks with a mechanical advantage.

Abstract: Disclosed is a method of fabricating an electrical contact to a region which lies at the surface of a semiconductor substrate and is doped opposite thereto. The method includes the steps of forming the combination of a silicide of a noble metal at the surface of the region, a layer of a barrier metal over the silicide, and a patterned conductor on a portion of the barrier metal layer which partly covers the region; etching partway through the portion of the barrier metal which is not covered by the patterned conductor; and thereafter oxidizing to completion, the portion of the barrier metal layer which is not covered by the patterned conductor and which remains after the etching step.

Abstract: An improved read-only/read-write semiconductor memory of the type that includes a semiconductor substrate with dopant atoms of a first conductivity type, a pair of spaced-apart charge storage regions at the surface of the substrate, a bit line at the surface of the substrate spaced apart from the charge storage region, respective MOSFET transistor gate regions at the surface of the substrate between the bit line and the charge storage regions, and a conductor over the storage regions; the improvement comprising dopant atoms of a second conductivity type in one of the storage regions, and dopant atoms of the first conductivity type in the other of the storage regions having a greater doping concentration than is in the body of the substrate; and circuitry for applying a read-write mode voltage to the conductor to permit charge to be stored in both of the storage regions, and for applying a read-only mode voltage to the conductor to permit charge to be stored in the one storage region and simultaneously prevent

Abstract: This disclosure relates to a network of stations having a single transmission bus. A bus assignment control line is daisy-chained to all of the stations to form a closed loop such that an assignment signal will circulate through the loop and return to the originating station after each station has been given an equal chance to be serviced. Each station is provided with means to detect when the preceding station is malfunctioning or is not turned on, and in response thereto, to transmit a bus assignment control signal to the next succeeding station if it itself does not require access to the transmission bus.

Abstract: An impedance control circuit with either current-controlled or voltage-controlled feedback loops in a transmission system. The impedance can be set at desired values, including complex values, and be different at different frequencies. The circuit is particularly useful in subscriber line interface circuits in telephone systems.

Abstract: In the disclosed method, dopant atoms of a first conductivity type are implanted into the surface of a semiconductor substrate to form a channel region of each transistor having a relatively high dopant density at a predetermined depth below the surface and a substantially lower dopant density at the surface. This eliminates reachthrough in the channel without adversely increasing the channels threshold voltage. Thereafter, dopant atoms of a second conductivity type are implanted into the substrate to form source and drain regions adjacent to the channels having a depth of less than 0.3 .mu.m below the surface. This minimizes the radius of curvature and corresponding depletion width at the respective junctions with the channel. Subsequently, a patterned insulating layer is formed on said surface at temperatures that are far below the insulating layer's flow point. This avoids diffusing the distribution of the implanted dopant atoms.

Abstract: Disclosed is a crystalline magnetic film having at least two rare-earth elements symmetrically disposed at lattice sites in the film's interior to there produce a magnetic moment perpendicular to the film's surface; and having those same rare-earth elements less symmetrically disposed at lattice sites in a region at the film's surface, to there produce a magnetic moment parallel to the surface. This in-plane magnetic moment resists hard bubbles from forming in the film; and it is stable at temperatures over 500.degree. C.

Abstract: A new input protection device for integrated circuits in which the metal-semiconductor contact between a metal line from a metal input pad and doped semiconductor region in the substrate leading to the rest of the integrated circuit is significantly rounded. This reduces the tendency of high current densities to flow through specific areas of the contact creating a short-circuiting metal-semiconductor spike into the substrate. Furthermore, the contact is enlarged beyond the normal size of contacts within the integrated circuit and the conducting region below is formed deeper and laterally away from the contact for further protection.

Abstract: Disclosed is a circuit for transforming digital input signals representing several digits within a binary coded decimal (BCD) address into digital output signals for addressing a binarily addressable memory. One portion of the circuit concatenates the three least significant bits of each digit of those input signals whose most significant bit is a logical "0", and concatenates only the least significant bit of each digit of those input signals whose most significant bit is a logical "1". Another portion of the circuit simultaneously generates a predetermined code that is representative of the most significant bits of all of the digits of the input signals.

Abstract: Disclosed is an electron-beam system comprised of an iris having an aperture of predetermined shape; a cathode for emitting electrons from an area which is substantially smaller than the aperture; a lens system for directing the emitted electrons along a path through the aperture to form a magnified image of the aperture; and a target for the electrons which is placed along the path of the aperture's demagnified shadow.

Abstract: A marking element assembly including a yoke which is driven by an arm. The arm is connected to a slider block which transfers motion to the yoke. The yoke has an interior channel for slider block free motion, with drag, after a marking element connected to the yoke stops yoke motion. The slider block moves against interior walls of the yoke dissipating arm motion and providing shock absorption for the marking element.

Abstract: Disclosed is an electron-beam cathode which emits electrons in a cone-shaped pattern whose electron density is substantially uniform throughout the cone. The cathode is comprised of a needle-shaped piece of single crystal tungsten having dopant atoms of zirconium and oxygen in the bulk thereof, and having only a single (100) surface on the needle's tip. This cathode is formed by the steps providing a needle-shaped piece of single crystal tungsten having dopant atoms of zirconium and oxygen in the bulk thereof, and having a plurality of ring-shaped (100) surfaces on the needle's tip; and subsequently transforming those surfaces into diagonally oriented planar surfaces by heating the needle in an atmosphere of oxygen to diffuse tungsten atoms from the needle's tip to its sides.

Abstract: A digital-to-analog converter is provided which converts a series of digital binary numbers into an analog signal having an amplitude proportional to the values of the binary numbers. The disclosed embodiment of this invention includes a segment generator having input terminals coupled to receive the most significant digits of the binary numbers to be converted, wherein the segment generator provides a first signal proportional to the values of the most significant digits of the binary numbers. A step generator is also included which receives the remaining lesser significant digits of the binary number and provides a second signal proportional to the values of these lesser significant digits of the same binary numbers. Additionally, means for combining the first and second signals is provided to form an analog signal proportional to the value of the binary number to be converted.

Abstract: A new and improved write and read control circuit for semiconductor memories is provided that comprises a first pair of transistors having their emitter terminals coupled to a current source, a base terminal of a first of the first pair being disposed for receiving data to be written in the array and a base terminal of a second of the first pair being coupled to a first reference potential, and each of the first pair of transistors having collector terminals; a second pair of transistors having their collector terminals coupled to a second reference potential, the base terminal of a first of the second pair being coupled to the collector terminal of the first of the first pair of transistors and the base terminal of a second of the second pair being coupled to the collector terminal of a second of the first pair, the emitter terminal of the first of the second pair being coupled to a second current source and forming a first output of the circuit, and the emitter terminal of the second of the second pair bein

Abstract: A sense amplifier and sensing scheme for sensing the normal or blown condition of fuses in a programmable read only memory (PROM) or similar device. A sensing circuit is provided with a threshold level separating high and low input levels indicative of the fuse condition. The sensing circuit has one circuit branch with a first current mirror with a temperature characteristic which provides a threshold level which is slightly divergent with reference to a low level input. Another circuit branch clamps the high input level to the slightly divergent threshold level and uses a second current mirror with a temperature characteristic which provides a high level slightly more divergent than the threshold level. By selecting mirror currents proportionally, high level and threshold level temperature characteristic divergence can be proportionally controlled in selected amounts with respect to the low level.