Abstract: The processing of a stereoscopic image using first and second images to facilitate computing a corresponding depth/disparity image can be facilitated by providing (101) the first and second images and then computing (103) a disparity value of each pixel in the second image by, at least in part, determining a likelihood of occlusion for at least some pixels comprising the second image using, at least in part, predicted occlusion information as corresponds to information contained in the first image. By one approach, this predicted occlusion information can be provided, at least in part, by processing (102) the first image, at least in part, by determining occlusion value information for at least some pixels as comprise the first image and then using the occlusion value information for the first image to determine a corresponding disparity information map for the first image.

Abstract: A method and apparatus are described for facilitation of radio frequency (RF) communication between a radio frequency identification (RFID) device and RFID tags for a conveyer system. The RFID device is positioned in proximity of the conveyor system. At least one conductive surface is coupled to the RFID device. The conveyer system transports articles, at least one which has one or more associated RFID tags. The conveyer system is operated such that the articles are brought in contact with the at least one conductive surface. The RFID device, the at least one conductive surface and one or more of the associated RFID tags are capacitively coupled allowing RF signals to be communicated between RFID device and the one or more associated RFID tags. This enables data to be electronically read from the one or more associated RFID tags.

Abstract: A small volume antenna (100) has the form of a polygonal (e.g., square) board with multiple antenna elements (104, 110) located at vertices (114, 116) (e.g., opposite vertices). The antenna elements (104, 110) include two segments (118, 120, 124, 126) that meet at corners (122, 128) that are located at the vertices (114, 116). Peripheral portions (134, 136, 138, 140) of a ground plane (132) that underlie the segments (118, 120, 124, 126) of the antenna elements are deleted, and slots (154, 162) that have two joined segments (156, 158, 164, 166) that parallel the segments (118, 120, 124, 126) of the antenna elements (104, 110) are formed in the antenna elements. The antenna elements (104, 110) are selectively loaded by switched impedance (e.g., capacitance) networks (172, 176, 178, 180, 182, 186, 190, 192). The antenna (100) is able to support operation in at least two broad operating bands.

Abstract: A sequentially laminated printed circuit board having highly reliable vias can be fabricated by pattern plating flanges or via lands on a copper foil, laminating the foil to a prepreg so that the flanges are embedded into the surface of the prepreg, creating via holes in the laminate that are substantially concentric with the individual flanges, plating the via holes with copper, chemically or mechanically milling off a portion of the copper plating and optionally some of the copper foil to reduce the overall thickness of the laminate, and laminating a second and optionally a third prepreg to the laminate. The resulting printed circuit board has the flanges embedded in the surface of the laminate so that the inside wall of the flange is electrically and mechanically attached to the outside wall of the plated through hole barrel.

Abstract: A process for reforming a plastic packaged integrated circuit die (100) includes grinding away (305) a bottom side (210) of a plastic package (205) and portions of a set of leads (110) that are in the plane of the grinding until a bottom surface (240) of an inner portion (230) of the set of leads is exposed at a peripheral region (235) of the inner portion, cutting (310) approximately perpendicularly to the top and bottom sides to remove portions of the plastic package and the set of leads that are outside the inner portion of the set of leads, and adapting (320) the bottom surfaces of the inner portion of the set of leads for reliable electrical connections.

Abstract: A method for forming closed vias in a multilayer printed circuit board. A dielectric layer is laminated to one side of a central core having a metal layer on each side. A second dielectric layer is laminated to the other side of the central core. Closed vias in the central core have been formed by drilling partially through but not completely penetrating the central core, and then completing the via from the opposite side with a hole that is much smaller in diameter to form a pathway that penetrates completely through the central core from one side to another. The via is then plated with metal to substantially close the smaller hole. Approximately one half of the closed vias are situated such that the closed aperture faces one dielectric layer and a remainder of the closed vias are situated such that the closed aperture faces the other dielectric layer.

Abstract: An apparatus is disclosed for a communication device (100) with a wideband antenna (102) supporting at least two common and one differential resonant modes. An apparatus that incorporates teachings of the present invention may include, for example, the communication device having an antenna (102) that includes a ground structure (202), a first elongated conductor (204) spaced from the ground structure, a second elongated conductor (206) separated from the first elongated conductor, third and fourth conductors (212) each coupled to the first and second elongated conductors forming a gap (205), a ground conductor (208) coupling the ground structure to one among the first and second elongated conductors, and a signal feed conductor (210) coupling to one among the first and second elongated conductors spaced from the ground conductor. Additional embodiments are disclosed. A ?10 dB bandwidth of at least 0.5 can be realized using electrical non-congruence.

Abstract: An overmolded electronic assembly (900, 1000, 1200) is fabricated from one or more overmoldable interface components (300, 400, 500, 1220, 1750) that may be electrical contacts or electronic components that have physical interfaces, such as speakers or sensors. The overmoldable interface components have a sacrificial end that is cut off from the remainder of the overmoldable interface components after being overmolded in an electronic assembly, providing a sealed cavity into the overmolded electronic assembly.

Abstract: A textured dielectric patch antenna is fabricated by applying a first mask pattern (310, 510, 610, 710, 915, 1015, 1210) to a first side of a solid panel made of a first material that is a ceramic dielectric and then sandblasting the solid panel through the first mask pattern from the first side to at least partially generate a shaped cavity (315, 920, 1040). The shaped cavity of the solid panel may be filled with a second material (330, 740). The first and second materials have substantially differing dielectric constants. The first side and second side of the solid panel are metallized (325), forming a patch antenna. The shaped cavities can be made more complex by using additional masking and/or sandblasting steps.

Abstract: An antenna system (205) includes an antenna structure (215), a receiver (220), and an antenna system controller (225). The antenna structure includes an arrangement of antennas (237), a signal combiner (240), and a switching matrix (235). The arrangement of antennas is designed to have a set of antenna element separations that are optimized to provide lowest correlation coefficients of intercepted radio signals for a corresponding set of electromagnetic environment types that vary from a very low density scattering environment to a maximum density scattering environment. The antennas (230), (231), (232), (233), (234) in the antenna arrangement each include at least one element that has a common polarization. There is at least one antenna that is a dual polarized antenna. The antenna system selects an antenna element pair that corresponds to the environment type which it is operating and thereby receives a best combined signal.

Abstract: A photodetector (105) generates an electrical signal that has a value that changes approximately linearly at a rate that is proportional to an amount of light intensity incident on a photodetector since a most recent reset command was received at a reset input of the photodetector. A measurement circuit (110) generates a comparison state that is based on a comparison of the value of the photodetector signal to a reference signal in response to one of a plurality a sample pulses. A control circuit (160) generates the plurality of sample pulses at non-uniform time intervals and generates an elapsed time as an accumulation of the non-uniform time intervals occurring from the reset command to a change of the comparison state. In one embodiment, the reciprocal of an accumulated duration of the non-uniform time intervals is a linear function of a number of time intervals after the reset command.

Abstract: A flexible active signal cable (100, 200) includes a flexible printed circuit substrate (105), two electrical connectors (110), at least two metal conductors (115), at least one flexible optical waveguide (120), an optical transmitter (125), and an optical receiver (130). In some embodiments, the flexible active signal cable is less than 0.5 meters long and is capable of being wrapped and unwrapped from a 5 millimeter diameter mandrel 10,000 times with a low probability of failure at a test temperature, while supporting data rates greater than 25 megabits per second.

Abstract: One of a plurality of capacitors embedded in a printed circuit structure includes a first electrode (415) overlaying a first substrate layer (505) of the printed circuit structure, a crystallized dielectric oxide core (405) overlaying the first electrode, a second electrode (615) overlying the crystallized dielectric oxide core, and a high temperature anti-oxidant layer (220) disposed between and contacting the crystallized dielectric oxide core and at least one of the first and second electrodes. The crystallized dielectric oxide core has a thickness that is less than 1 micron and has a capacitance density greater than 1000 pF/mm2. The material and thickness are the same for each of the plurality of capacitors. The crystallized dielectric oxide core may be isolated from crystallized dielectric oxide cores of all other capacitors of the plurality of capacitors.

Abstract: A system and method for measuring user interaction with a defined space, such as an advertisement space, on network site on a network, preferably being a web page of a website on the Internet. The system includes at least one server in communication with the network, and the server hosts one or more network sites where each network site includes a display area having one or more defined spaces, and each defined space has a predetermined area on the display area of the network site. The system further includes at least one user computer in communication with the network, and the user computer includes a browser that selectively interacts with the network sites, and has a cursor manipulated by the user about the display area of an interacted network site. The user computer selectively records interaction data relative to cursor placement on a specific defined space on the display area of the interacted network site and then transmits the interaction data to the server hosting the defined space.

Abstract: An apparatus is directed to increasing the resolution of digital color imaging that includes a photosensing semiconductor structure. The apparatus provides a monocrystalline silicon substrate, a first buffer layer epitaxially formed and overlying the monocrystalline silicon substrate, and a first photodiode layer overlying the first buffer layer and operable to provide a first signal indicative of a color associated with a first wavelength of light. The apparatus may further provide a second buffer layer overlying the first photodiode layer and a second photodiode layer overlying the second buffer layer operable to provide a second signal indicative of a color associated with a second wavelength of light.

Abstract: A method and apparatus is provided that dynamically allocates processor resources to data transfer-related operations, minimizing the processor resources used for data transfer-related operations and maximizing the processor resources available for other applications. The apparatus comprises a communication device (104), comprising a processing unit (204) and a complexity controller (206), which communication device (104) is capable of executing multiple data transfer-related operations and is highly configurable. The complexity controller (206) monitors a condition of a communication channel (102) and determines the best configuration of communication device (104) in regard to processor resource utilization to meet a given Quality of Service requirement for the condition of channel (102) and to maximize the processor resources available for other applications, such as data terminal equipment user applications (108) or signal processing by other communication devices using the same host processor.

Abstract: A high pressure sensor mounting configuration (100) includes a cylindrical pressure sensor cavity (105), an internally threaded collet (170), and a housing (160). The cylindrical pressure sensor cavity includes a convex conical open end and a first bearing surface (115). The internally threaded collet includes a second bearing surface (175) that bears on the first bearing surface when the internally threaded collet is threaded onto a pressure port (140), causing the convex conical open end (110) to bear on a concave conical mating surface of the pressure port. The housing captures the collet on the pressure sensor cavity.

Abstract: A display structure (200, 500, 600, 700, 800) comprises an emissive layer (260, 360, 460) and an excitation prevention layer (270, 370, 470, 735, 840). The emissive layer includes a set of first color emitting areas (211, 216, 221, 311, 316, 321, 411, 416, 421) that emit a first color light in response to light that is generated by a first set of light emitting diodes (LEDs) (210, 215, 220, 310, 315, 320, 410, 415, 420) that are preferably organic. The excitation prevention layer is disposed at the front side of the emissive layer and includes a first set of excitation prevention filter areas (225, 230, 235, 325, 330, 335, 420, 430, 435). In one embodiment, a first set of excitation prevention filter areas block a band of the light that is incident upon the emissive layer from the front of the display, wherein the blocked band of light is within an excitation band of the first set of LEDs.

Abstract: In one embodiment, a peelable circuit board foil (200) has a metal support layer (205) and a conductive metal foil layer (210) bonded by an inorganic release material (215). The conductive metal foil layer has a an exposed surface (212) that is coated with a high temperature anti-oxidant barrier (220) and has a roughness less than 0.05 microns RMS. In a second embodiment, the peelable printed circuit foil (200) has a crystallized dielectric oxide layer (405) disposed on the exposed surface of the conductive metal foil layer and an electrode layer (415) disposed on the crystallized dielectric oxide layer, forming a dielectric peelable circuit board foil (400) that may be adhered to a layer of a flexible or rigid circuit board, after which the metal support layer can be peeled away, leaving a capacitive structure including the metal foil layer, the crystallized dielectric oxide layer, and the electrode layer.

Abstract: An interconnection device (300) with a number of links (306, 308, 310, 312 and 314), each link having a number of link input ports (302), link output ports (304) and storage registers (316). An input selection switch (402) is coupled to a selected link input port to receive an input data token. The storage registers (316) may be used to store input data tokens. A storage access switch (404) is coupled to the input selection switch (402) and to the storage registers (316) and may be used to select the current input data token or a token from the storage registers as an output data token. An output selection switch (406) receives the output data token and provides it to a selected link output port. The interconnection device may, for example, be used to connect the inputs and outputs of the processing elements of a vector processor or digital signal processor.