Abstract: A backplane interconnection system for interconnecting an array of electronic components, such as integrated-circuit (IC) chip packages mounted on multilayer printed circuit boards. The backplane interconnection system includes an interface board and one or more interconnecting circuit board and a plurality of insulating boards arranged on a heat sink. The interconnecting circuit boards and the insulating boards are alternately interposed between the interface board and the array of electronic components such that an insulating board is positioned adjacent both the interface board and adjacent the array of electronic components. Connector elements disposed in selected openings of the insulating boards make electrical connections between contact areas on the interconnecting boards, the electronic components and the interface board.

Abstract: A high-speed, high-resolution superconducting counting A/D converter providing greatly increased conversion speeds with a low device count. The superconducting counting A/D converter includes includes a double-junction SQUID quantizer and a bidirectional binary counter having n stages of floating four-junction SQUID flip-flops, where n is the number of bits of accuracy of the counter. The quantizer continuously tracks an analog signal, generating up-count and down-count voltage pulses of the same polarity on two different output lines for increasing and decreasing values of the analog current, respectively. The bidirectional binary counter algebraically counts the voltage pulses, increasing the binary count when up-count pulses are received and decreasing the binary count when down-count pulses are received. Several techniques for reading the contents of the bidirectional binary counter at the end of each sampling interval are also disclosed.

Abstract: An improved electrical connector for making electrical connections between electronic components. The improved electrical connector includes an insulating board interposed between metalized contact areas on the electronic components. The insulating board has openings at positions corresponding to the contact areas of the electronic components, with electrical connections between the contact areas established with conductive connector elements positioned in the openings of the insulating board. The connector elements are preferably each formed from a strand of metal wire, each strand being wadded together to form a nearly cylindrical "button" of material having a density of between twenty and thirty percent. The improved electrical connector provides high density contact areas, easy engagement and disengagement of the electronic components, and minimum electrical resistance between the contact areas.

Abstract: An integrated-circuit (IC) chip packaging construction for mounting and interconnecting IC chips and IC chip packages with a multilayer printed circuit board, without soldering, special tooling or special labor, and for interconnecting IC chips with minimized interconnection lead lengths between the IC chips, without cable harnesses or back-panel wiring. The IC chips and IC chip packages are mounted and interconnected using an insulating board having openings through it, and a number of connector elements in the form of compressible wads of conductive wire. The connector elements are disposed in selected openings in the insulating board and compressed into contact with the contact areas on the IC chips and IC chip packages. In a three-dimensional construction employing the principles of the invention, the IC chips are arranged in modules, and interconnections may be made between IC chips within each module, transversely between modules, and in a third direction between layers of modules.

Abstract: A modified quasi-Gray encoding technique for use in parallel analog-to-digital converters that significantly reduces errors resulting from multiple simultaneous inputs. The encoding technique converts a one-in-(2.sup.n -1) digital code into an n-bit binary word that is the same as quasi-Gray code in all but its least significant bit position, which alternates in the same manner as standard binary code. For many multiple simultaneous inputs, the modified quasi-Gray code substantially reduces errors when compared with quasi-Gray code. For example, the modified quasi-Gray code reduces the maximum error from 3 to 2 for two simultaneous inputs separated by two bit positions (n=8). In a typical parallel analog-to-digital converter employing the modified quasi-Gray code, the one-in-(2.sup.n -1) digital code is converted into modified quasi-Gray code using a read-only memory.

Abstract: A field-effect transistor (FET) and a corresponding method for its fabrication, the transistor having a source and a gate located at opposite faces of an active channel region formed in a substrate, the source being substantially shorter in effective length than the gate and located symmetrically with respect to the gate. The transistor also has two drains, located one at each end of the channel region, and charge carriers flow from the source to the drains in two paths, under control of the same gate. Electrical contact with the source is made from beneath the substrate, while contact with the gate and drains is made from above. The resulting device has a large incremental transconductance and relatively small parasitic impedances, and therefore can operate at much higher frequencies than conventional FET's.

Abstract: A high electron mobility transistor (HEMT) structure, and a corresponding method for its fabrication, in which the maximum power output is increased by a factor of approximately two. The structure includes a stop etch layer, which is of aluminum arsenide in the disclosed embodiment, and which functions both to facilitate selective etching during fabrication and, because of its relatively wide band-gap, as a current confinement layer during operation. Since the current confinement action has a detrimental effect in the region of the source contact of the device, by tending to raise the source resistance and the threshold voltage at which current saturation occurs, this effect is avoided by aligning the source region with an edge of the gate electrode during fabrication, to minimize the source resistance and the threshold voltage for maximum current saturation.

Abstract: The thickness of a selected layer in an epitaxial heterojunction transistor is initially set to the exact desired value upon its formation, preferably by molecular beam epitaxy, and its thickness is left virtually unaltered during the rest of the fabrication process. Means are provided to prevent alteration of this thickness during subsequent exposure of the selected layer.

Abstract: A multipurpose modular spacecraft is adaptable quickly and easily for performing a variety of short- and long-range space missions, such as on-orbit maintenance missions and the like. The multipurpose modular spacecraft comprises a fully integrated short-range space vehicle including one or more relatively small modular propulsion sets which provide propulsion capability for relatively short-range missions and close-in maneuvering requirements. Longer-range propulsion capability is provided by a comparatively larger propulsion module designed for removable nested mounting within an open-sided chamber in the short-range vehicle. Relatively simple and easily operated latch mechanisms retain the propulsion sets and the propulsion module on the short-range space vehicle in preselected positions with relatively simple electrical fittings connected together to provide a control interface with the short-range space vehicle.

Abstract: An electrooptically tunable waveguide array combined with a semiconductor phase-locked laser array, to provide both amplitude shaping and phase control of the optical output. The tunable waveguide array includes an input waveguide array section with an array spacing matching that of the laser array, a tunable coupling array section for tailoring power distribution among the array elements, a tunable phase shifter array section for tailoring the relative phase distribution among the array elements, and an output waveguide array section of various possible configurations. The tunable waveguide array can be implemented either externally, independent of the laser array, or incorporated into the laser array to form a composite cavity-array.

Abstract: A multilayer printed circuit board in which multiple layers of a composite material, fabricated by the lay-up of an aramid fiber tape, are employed to provide a circuit board with a desired coefficient of thermal expansion. Tape lay-up of aramid fibers provides a composite layer having a lower thermal coefficient of expansion than a composite layer fabricated from woven aramid fibers. Degradation in the tensile modulus of elasticity caused by the over and under characteristics of woven fabrics is also eliminated by tape lay-up, thus providing a circuit board with better mechanical strength. In addition, tape lay-up reduces the amount of resin required to fabricate the circuit board and eliminates the need for twisting the aramid fibers into yarns and then weaving the yarns, thus reducing the cost of the circuit board.

Abstract: An ion milling method is disclosed that provides a manufacturing technique for mass producing microscopic surface features using a wide variety of media that includes semiconductors, metals, and glasses. In the preferred embodiment, vertical and 45 degree mirrors are formed simultaneously in semiconductor laser diodes in order to produce monolithic two dimensional arrays of surface emitting lasers. Standard double heterostructure semiconductor laser diodes are first grown on a wafer using metalorganic chemical vapor deposition techniques. An ion milling gun is oriented at a particular angle from the longitudinal axis of the active layer of the laser and emits a stream of atomic particles toward the lasers producing a generally two sided cut or notch that extends downward from the top surface of the semiconductor laser and traverses the active layer.

Abstract: A high-resolution shaft encoder and a related encoding method for accurately measuring angular position and velocity of rotating shafts. The high-resolution shaft encoder includes an annular-shaped actuator ring that rotates at high speed, a shaft centered within the actuator ring, and an encoder housing. The shaft encoder generates measurements of shaft position .theta..sub.p and velocity .omega..sub.p, with respect to the encoder housing, from measurements of three time intervals t.sub.p, t.sub.r and .DELTA.t. These time interval measurements are computed from the output of a sensor element positioned on the shaft and a sensor element positioned on the encoder housing, both of which respond to an input actuation element positioned on the rotating actuator ring.

Abstract: A semiconductor light-emitting device structured similarly to an index-guided laser, but having waveguide channels that are formed at a selected small angle of inclination with respect to a direction normal to cleaved facets formed in the structure. The angle of inclination should be at least half the critical beam angle above which total internal reflection will not occur within the waveguide channels. The angled condition of the waveguide channels ensures that effective mirror losses at the facets exceed the modal gain of the device, so that lasing will not occur, even when the current and power are increased to high levels. The device produces up to 30 mW or more of output power at a large spectral bandwidth and small coherence length.

Abstract: A semiconductor laser structure having the same advantages as a channeled substrate planar laser, but without the difficulties of fabrication associated with this structure. The structure includes a substrate, a planar first cladding layer, a planar active layer, and a second cladding layer in which a mesa region is formed. A blocking layer is formed over the second cladding layer and electrical contact is made through the blocking layer in the region of the mesa. The blocking layer functions to confine current flow in the mesa region and to provide index-guiding of light in the mesa region. Because of its simple geometry, the structure can be conveniently formed using a desirable fabrication process, such as metalorganic chemical vapor deposition (MOCVD). In one disclosed embodiment of the invention, the mesa is broadened to include at least one intermediate ledge on each side of a central pedestal.

Abstract: A multilayer printed circuit board in which multiple layers of a composite material, fabricated by the lay-up of an aramid fiber tape, are employed to provide a circuit board with a desired coefficient of thermal expansion. Tape lay-up of aramid fibers provides a composite layer having a lower thermal coefficient of expansion than a composite layer fabricated from woven aramid fibers. Degradation in the tensile modulus of elasticity caused by the over and under characteristics of woven fabrics is also eliminated by tape lay-up, thus providing a circuit board with better mechanical strength. In addition, tape lay-up reduces the amount of resin required to fabricate the circuit board and eliminates the need for twisting the aramid fibers into yarns and then weaving the yarns, thus reducing the cost of the circuit board.

Abstract: An improved switch controller and related method for regulating the supply voltage of a solar cell array. The switch controller includes at least two shift registers, with additional shift registers concatenated as required by the size of the array. Each of the shift registers controls segments of the solar cell array having increasingly larger outputs, with the first shift register providing fine resolution control of the supply voltage and the second and additional shift registers providing increasingly-coarser resolution control of the supply voltage. The improved switch controller provides improved switching characteristics for the regulation of the supply voltage of a solar cell array.

Abstract: A water jet aerator in combination with a diverter valve including an aerator housing, a valve body that is rotatably positioned within the aerator housing, and a swivel nozzle. The aerator housing includes a water inlet conduit, a water outlet conduit, and an air inlet conduit, while the valve body forms two chambers, a diverter chamber and an aeration chamber. As the valve body is rotated in one direction within the aerator housing, water flow from the water inlet conduit to the aeration chamber is diverted to the water outlet conduit, while the air inlet conduit is proportionally closed to the aeration chamber. As the valve body is rotated in the other direction, water flow from the water inlet conduit to the water outlet conduit is diverted to the aeration chamber, while the air inlet conduit is proportionally opened to the aeration chamber.

Abstract: An improved electro-optic coupled waveguide interferometer (50) is provided. The device comprises a single input (52), a Y-junction splitter (54), two interferometric arms (56a, 56b), a Y-junction combiner (58), a single output (60) and multiple equal-length sections of electrodes (62a-d) with alternating applied voltage polarities. The device of the invention permits use of much smaller Y-junction branching angle, which reduces scattering losses, or a shorter branching waveguide section, which allows construction of a device having an overall shorter length than prior art interferometers. The device takes advantage of a close placement of the interferometer arms, which results in a transfer of optical energy and facilitates a single-gap electrode structure for efficient push-pull operation. The use of multiple-section electrodes restores the high modulation depth otherwise destroyed by the close placement of the interferometric arms.

Abstract: An improved test probe card for testing unpackaged integrated-circuit (IC) chips prior to installation of the chips in some type of electronic device. The test probe card includes a chip insulating board having openings at positions corresponding to contact areas of an IC chip and a test circuit board having inner contact areas at positions corresponding to the openings in the chip insulating board. Electrical connections between the IC chip and inner circuit board contact areas are established with conductive connector elements positioned in the openings. Circuit board traces electrically connect the inner circuit board contact areas with outer contact areas located about the periphery of the circuit board. The outer contact areas are preferably connected to a testing device using coaxial cables, which are electrically connected to the outer contact areas with a coaxial cable connecting board.