Patents Represented by Attorney Joffman Warnick LLC

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  • Dynamic control of back gate bias in a FinFET SRAM cell
    Patent number: 7681628
    Abstract: The present invention provides dynamic control of back gate bias on pull-up pFETs in a FinFET SRAM cell. A method according to the present invention includes providing a bias voltage to a back gate of at least one transistor in the SRAM cell, and dynamically controlling the bias voltage based on an operational mode (e.g., Read, Half-Select, Write, Standby) of the SRAM cell.
    Type: Grant
    Filed: April 12, 2006
    Date of Patent: March 23, 2010
    Assignee: International Business Machines Corporation
    Inventors: Rajiv V. Joshi, Keunwoo Kim, Edward J. Nowak, Richard Q. Williams