Abstract: A foreshortened log-periodic antenna which includes variously configured dipole elements and a tapered feedline is disclosed. The dipole elements are arranged in four regions. A first region, located nearest to a feed end of the antenna, includes solid triangular dipoles having constant base-to-height ratios. A second region, adjacent to the first region, includes solid triangular dipoles having decreasing base-to-height ratios. A third region, located adjacent to the second region, includes a single linear dipole. A fourth region, located adjacent to the third region and nearest to a low frequency end of the antenna, includes foreshortened dipoles. The feedline may be implemented either in coaxial or microstrip form so that a lower characteristic impedance is pressed at the feed end of the antenna than at the low frequency end of the antenna.

Abstract: A technique for enabling a peregrinating Cellular Mobile Radiotelephone (CMR) subscriber to automatically receive, in a foreign service area (that is, an area outside his home service area), calls placed to his MID at his home service area. A roaming processor is coupled through a cable or LAN to a switch associated with a foreign MTSO and is coupled, preferably through a private data network, to a switch associated with the subscriber's home MTSO. Within the roaming processor resides a program that detects the reception at the foreign switch of a predetermined code indicating that calls placed to the roamer's home MID are to be forwarded to the foreign MTSO. Subsequent to the "validation" of the roamer and to the performance of certain software housekeeping tasks, the roamer is assigned a Temporary Directory Number (TDN) for use in the remote service area. The FMR processor then commands the subscriber's home MTSO switch to forward calls, placed to the subscriber's MID at the home MTSO, to the TDN.

Abstract: A CMR (Cellular Mobile Radiotelephone) Cell Site includes a foundation for a CMR equipment edifice. The foundation, together with the edifice, rests on a leveled surface. An antenna tower is mounted on the roof of the edifice and is secured by an antenna mounting brace embedded in the roof of the edifice. The antenna is guyed at three elevations along the antenna's height to three points on the foundation. The edifice encloses a 10-inch-square, steel support column, positioned within the edifice directly beneath the antenna mounting brace, for supporting the antenna tower. Four-inch-thick slabs of concrete are inserted between the floor of the edifice and the support column and between the support column and the roof so as to isolate the interior of the building from electrical disturbances such as lightening.

Abstract: A card holder assembly for holding a dialing instruction card for a paystation telephone includes a monolithic bracket that exhibits a planar forwardmost surface to which a card holder is attached. The bracket also exhibits a lateral surface oriented orthogonally to the forwardmost surface and arranged to be positioned alongside the paystation telephone. A ligamentary portion joins the lateral surface to a bracketing surface that includes a mounting notch for supporting the bracketing surface, and, thereby, the entire card holder assembly, on a mounting surface such as the rear wall of the paystation booth. A card holder, configured to have a perimeter conforming to the perimeter of the forwardmost surface, is attached to the forwardmost surface by virtue of hardware inserted through access holes that align with mounting holes in the forwardmost surface.

Abstract: An in-line splice case assembly includes a pair of end plugs exhibiting axially disposed apertures for mating optical fibers and fiber wands associated therewith. A pair of elongated, rigid torque bars join the end plugs and support at least one, but preferably two, rotatably attached, resilient clips, the clips for securing appropriate elastomeric fiber splices. A substantially cylindrical housing encloses the end plugs, the torque bars, and the clips. The housing exhibits an interior surface having threaded portions at opposite ends thereof, complementary to threaded portions of a pair of end caps threaded thereinto.

Abstract: A hermaphroditic housing for a fiber optic splice comprises substantially identical, and therefore interchangeable, mating sections. Each of the sections exhibit a substantially tubular contour and is characterized by a primary portion having an orifice at one end for the insertion of an optical fiber, a tubular locking portion having a diameter greater than the diameter of the primary portion, and a tapered portion disposed between and joining the primary portion and the gripping portion. The housing provides a trisectional, substantially cylindrical cavity comprising a first section having a diameter appropriate for the insertion of a ferrule crimp, a second section having a diameter greater than the diameter of the first section and appropriate for the insertion of an elastomeric splice, and an intermediate section disposed between the first section and the second section and having a diameter greater than the diameter of the first section but less than the diameter of the third section.

Abstract: In conjunction with a hand-held, credit-card telephone for use aboard, for example, commerical aircraft, a telephone holder and credit-card unlatching mechanism ("CCUM"). The holder includes a holder channel of generally longitudinal, stepwise construction. The holder also includes a face plate with a vertical slot for the insertion of a credit card. A butt plate, secured to one end of the holder channel, and the CCUM, which is secured to the other end of the holder channel, together form, with the holder channel, a telephone-receiving cavity in which the telephone is secured when not in use.The CCUM itself includes a latch plate attached to the holder channel and exhibits a longitudinal slot in alignment with the vertical slot in the face plate. A latching mechanism is secured to the holder channel and operates to selectively, in response to the insertion of a credit card, latch or unlatch the telephone from the telephone-receiving cavity.

Abstract: A TTL-to-CMOS converter consists of a plurality of N-channel and P-channel MOS transistors, each of which is fabricated so as to have a predetermined channel Width-to-Length ratio (W/L). The transistors are arranged to include an input complementary pair for accepting TTL-level signals and an output complementary pair for providing CMOS-level signals. An N-channel tracking transistor is coupled between the drain electrodes of the P-channel and N-channel transistors of the input complementary pair. The (W/L) of the tracking transistor is approximately 1/8 to to 1/7 times the (W/L) of the N-channel transistor of the input complementary pair. This arrangement establishes a converter switch point with a significantly greater degree of accuracy than otherwise attainable. A pull-up transistor has a gate electrode coupled to the input terminal of the input complementary pair and a drain electrode coupled to the input electrode of the output complementary pair.

Abstract: A Current Reference for providing a feedback signal to a current driver in a current-series, feedback-controlled current source circuit that includes at least one, but more likely more than one, controlled current source. The Current Reference comprises a current mirror having an input transistor coupled to an output transistor in a current mirror configuration. The input transistor of the current mirror is driven by a constant current source, Icc, so that the current mirror output transistor causes a current substantially equal to Icc to flow out of a summing node. A sensing transistor is coupled to a controlled current source for providing a current into the summing node that is representative of the current delivered by the controlled current source. As a result, the current flowing away from the summing node and into a phase inverter is representative of the difference between the delivered current and Icc.

Abstract: An integrated circuit includes an interface circuit for coupling with a relative high-level VOICE circuit and a relatively low-level DIALER circuit to a subscriber line. A first shunt transistor is coupled across the telephone line and has its collector current forced by a current sink driven from the VOICE circuit. A second shunt transistor is coupled in a current mirror configuration to the first shunt transistor and supplies current to the DIALER circuitry. The interface circuit includes a saturation prevention circuit coupled to the current sink and to the second shunt transistor for sensing a tendency of the second shunt transistor toward saturation and for increasing the collector current load on that transistor in response. The saturation prevention circuit includes a voltage offset element and a sensing transistor arranged to form a loop with the collector-to-base junction of the second shunt transistor.

Abstract: A remote isolation apparatus includes double-position switch for selectively coupling or isolating a telephone company central office and a multi-wire subscriber line. The switch operates according to a remotely originated activating signal so that, until the switch is operated, the central office is connected to the subscriber line through normally closed contacts. When the switch is operated, the central office TIP and RING leads are coupled to a reference terminal, and the central office is isolated from the subscriber line.The apparatus includes circuitry for detecting the application of an activating signal to the line and for optically coupling a resulting trigger signal to a pair of monostable timers. The timer output pulses are arranged so that the relay is energized subsequent to the removal of the activating signal and remains energized during an interval established by the relative durations of the timer output pulses.

Abstract: An apparatus for enabling the performance loop resistance and DC balance checks on a subscriber line includes relay contacts coupled across the line terminals. The apparatus includes circuitry for detecting the application of an activating signal to the line and for optically coupling a resulting trigger signal to a pair of monostable timers. The timer output pulses are arranged so that the relay is energized subsequent to the removal of the activating signal and remains energized during an interval established by the relative durations of the timer output pulses.

Abstract: A differential amplifier feedback current mirror includes a feedback current source that provides a correction current to one input of a differential amplifier. The correction current is synthesized by comparing a sample of the current delivered by a string of controlled current sources to a reference current set up by a constant current source. A current driver is included in the differential amplifier feedback loop and a current source buss is driven by the current driver. The feedback configuration assures that the current delivered by the dependent controlled current sources accurately tracks the current established by the reference current source, irrespective of the base current offset attributable to each of the dependent controlled current sources.

Abstract: A method of coding a ROM from a partially processed semiconductor wafer comprising a substrate, a plurality of spaced regions separated by regions of isolating oxide deposited in said substrate, a layer of gate oxide overlying each of said spaced regions and a gate electrode overlying each layer of said gate oxide, is described comprising the use of photoresist material for preventing the formation of source and drain regions under selected ones of said gate electrodes during a subsequent doping step. The photoresist material restricts the area of implantation of dopant used for forming source and drain regions in the ROM device.

Abstract: Circuitry for supplying power to low-level DIALER portions of a telecommunications integrated circuit device comprises a PNP current sourcing transistor mirrored to a bypass transistor. The bypass transistor is coupled across the TIP and RING terminals of the subscriber line so as to maintain current flow sufficient to prevent the central office from "dropping out". A sensing transistor drives a current sink coupled to the current sourcing transistor in order to prevent that transistor from dropping into saturation and degrading the necessarily high impedance level that must be presented across the subscriber line. Saturation is prevented through the operation of a circuit loop that includes the base-collector junction of the current sourcing transistor, the emitter to-base junction of the sensing transistor, and a voltage offset element.

Abstract: A foreshortened log periodic antenna includes variously configured dipole elements which are arranged in four regions along the axis of the array. The first region includes a series of solid, triangular dipoles characterized by substantially constant base/height ratios. The second region similarly includes a series of solid, triangular dipoles. However, these elements are characterized by decreasing base/height ratios so as to afford a gradual transition into the third region, which includes a single linear dipole. The fourth region includes a series of solid or hollow rectangular elements connected by respective stems to the antenna feedline. In a manner set forth in U.S. Pat. No. 3,732,572, entitled "Log Periodic Antenna with Foreshortened Dipoles", the rectangular elements effect a reduction in the width of the array without a substantial affect on electrical performance.

Abstract: A process for enhanced formation of vias in multilevel conductive structures for integrated circuit devices. A semiconductor wafer, bearing a multilayered first level metalization characterized by a tungsten alloy top layer, is annealed in a suitable ambient so as to form a distinctly colored superficial film atop the first level metalization. The interlevel dielectric is then deposited and subsequently selectively dry etched until the film becomes discernible, the film itself serving as an etch stop so as to protect the top layer of the first level metalization. Exposed portions of the superficial film are then removed through a standard plasma etch step. Remaining areas of the film promote intimate binding between the first level metalization and the interlevel dielectric.

Abstract: A video subsystem for a hybrid teletex facility includes a computer-based video control unit coupled to a general purpose interface bus, such as the IEEE 488, capable of parallel data transfer at the requisite rate. Appended from the bus are a plurality of microprocessor-based video cluster controllers for supervising the retrieval of selected video segments from randomly accessible storage media, i.e., video discs. The selected video segments are frequency translated through associated video modulators and thereafter coupled, under supervision of the video controller, through a video switch to selected broadcast frequency modulators. The outputs of the broadcast modulators are arranged by a video combiner into a composite NTSC video signal suitable for transmission or, for example, a CATV system.

Abstract: In a signal measurement or processing system, specifically in a system which contemplates measurement or processing of video information and which is particularly adapted for use with microprocessors or microcomputers characterized by modest memory capacity and computational capability, a digital hysteresis circuit that enhances the quantization of an analog video signal. The hysteresis circuit is part of a transition detector that quantizes the brightness component of a composite video signal level into mutually exclusive and exhaustive BLACK and WHITE levels determined with regard to a THRESHOLD level. The THRESHOLD is established by applying a REFERENCE voltage, derived from the peak amplitude of the video signal, to a reference input of a D/A. The THRESHOLD is then established as a predetermined percentage of the REFERENCE voltage, as determined by a multibit digital CONTROL signal applied to the CONTROL input of the D/A.

Abstract: In a 1.2 micron CMOS process, the gate oxide is formed by growing a 1000 Angstrom thickness of sacrificial oxide, immediately performing an oxide strip and then effecting a thin gate oxidation. The gate oxidation step is characterized by a temperature ramp from 700 to 950 degrees Centigrade in a flow of 9 liters per minute nitrogen and 0.36 liters per minute oxygen. At the 950 degrees Centigrade point, the nitrogen flow ceases and the oxygen flow increases to 9 liters per minute. The temperature is then downwardly ramped to 900 degrees Centigrade.