Abstract: There is disclosed, for use in an ATM network, a system for servicing an SVC connection between a first node and a second node operable to transmit and receive frame relay data frames, wherein the first node is coupled to an ATM access device incapable of providing to the first node support for switched virtual circuit (SVC) connections. The system comprises: 1) a connection controller capable of establishing a fixed connection between the ATM access device and a selected intermediate node in the ATM network; and 2) a frame relay proxy controller disposed at the selected intermediate node and adapted for communicating via the fixed connection established by the connection controller, wherein the frame relay proxy controller receives SVC signaling information from the first node via the fixed connection and establishes an SVC connection with the second node.

Abstract: There is disclosed a security apparatus, for use in a wireless network comprising base stations that communicate with mobile stations, for preventing unprovisioned mobile stations from accessing an Internet protocol (IP) data network via the wireless network. The security apparatus comprises a database that stores a first server IP address of a first provisioning server in the wireless network, and a first controller for receiving a first IP data packet transmitted by a first mobile station, wherein the first IP data packet comprises a first source IP address and a first destination IP address. The first controller determines if the first mobile station is provisioned and transmits the first IP data packet to the IP data network if the first mobile station is provisioned.

Abstract: There is disclosed an adaptive pre-distortion correction circuit for use in an RF transmitter having a transmit path capable of receiving a digital input baseband signal and generating a modulated RF output signal. The adaptive pre-distortion circuit comprises 1) input sampling means coupled to an input of the transmit path for capturing from a first digital input sample of amplitude X; 2) demodulation circuitry coupled to an output of the transmit path for receiving and demodulating the modulated RF output signal to produce a digital output baseband signal; 3) output sampling means coupled to the demodulation circuitry for capturing a first digital output sample corresponding to the first input sample; and 4) processing means for comparing the first digital input sample and the first digital output sample and calculating a pre-distortion correction value corresponding to the amplitude X.

Abstract: There is disclosed a test apparatus for use in a wireless network base station comprising a non-radio unit for processing baseband signals and a radio unit separate from the non-radio unit for transmitting and receiving radio frequency (RF) signals. The test apparatus comprises: 1) a housing; 2) a first connector coupled via a first cable to the radio unit, wherein the first cable comprises signal lines carrying base station signals between the radio unit and the non-radio unit; 3) a second connector coupled via a second cable to the non-radio unit, wherein the second cable comprises signal lines carrying the base station signals between the radio unit and the non-radio unit; and 4) a first access connector that allows a signal measuring device to monitor at least one of the base station signals.

Abstract: A telecommunication base station transceiver subsystem that can be easily configured to provide single or multi-carrier frequency service. Capacity is increased and diversity reception is maintained from a single to a dual frequency system without the need for additional antennas. The base station is divided into a main unit and a radio unit such that the radio unit is positioned proximate to the antennas and the main unit is remotely located from the radio unit. Furthermore, a single base station transceiver can provide service via multiple wireless protocols, such as CDMA, TDMA, GSM or Analog. The base station transceiver can also operate on various transmit/receive frequencies as well as variable transmit power settings.

Abstract: There is disclosed, for use in a data processing device containing a master processor and a slave processor, a mode selection circuit capable of selecting the operating mode of the slave processor. The mode selection circuit comprises a mode determination circuit capable of determining the current operating mode of the master processor and a mode control circuit capable of causing the slave processor to operate in a selected operating mode in response to the current operating mode of the master processor. The mode selection circuit causes the slave processor to boot up to a test program stored in a ROM coupled to the slave processor whenever the master processor is in a test mode. If the master processor is in a system application mode, the mode selection circuit causes the slave processor to execute a system application program stored in a RAM coupled to the slave processor.

Abstract: A wireless communication system, such as a cellular communication system prioritizes calls to have a low, regular or high priority. The communication channels provided by a base station are divided into regular channels and reserved channels. All calls are connected on regular channels until the regular channels are all full. When the regular channels are all full, then regular priority calls are connected as low priority calls or not at all. If a regular priority call is connected as a low priority call it is connected via a reserved channel. Once all the reserved channels are full, then a high priority call is attempted to be connected by dropping a low priority call and using the reserved channel that the low priority call was using.

Abstract: There is disclosed a redundant switch comprising a primary controller capable of routing data packets from an input interface to an output interface and a secondary controller capable of performing data packet routing tasks performed by the primary controller after a switchover.

Abstract: There is disclosed a wireless communications network in which a group of base stations are served by a mobile switching center that maintains a master data record for all missed calls from mobile devices in all base station coverage areas. Missed call data are stored in different priority level queues in each of the bases stations. When a call is missed in a first base station coverage area, a time stamp or a sequence number for the missed call is stored in the mobile switching center. If the mobile device moves into a second base station coverage area, the mobile device re-originates the missed call. The second base station receives from the mobile switching center the priority level of the re-originated call and the time stamp or unique sequence number from the mobile switching center.

Abstract: In a CDMA-based communication system, a system and method for allocating channel bandwidths and chip rates. The system and method supports asymmetric bandwidths and chip rates for the forward and reverse channels. The system and method includes a negotiation process between a mobile station and a base station to select chip rates and bandwidths for use in the forward and reverse channels.

Abstract: In a CDMA communication system, a method and system for controlling forward link power by a mobile station in a handover state. The method and system include transmitting different power control bits to each base station to independently control the transmission power of each base station.

Abstract: There is disclosed a power control circuit for controlling the combined effective DC bias current of a bank of parallel RF power amplifiers disposed in the transmit path of an RF transmitter. The power control circuit comprises: 1) a first signal monitor for monitoring the level of a modulated RF output signal; and 2) an amplifier bias current controller for comparing the modulated RF output signal level and a known maximum output power parameter of the active RF power amplifiers to determine if the active RF power amplifiers are operating in the linear region. If the active RF power amplifiers are operating in or near the nonlinear region, the power control circuit enables one or more inactive RF power amplifiers to increase the effective combined DC bias current and linearity of the active RF power amplifiers.

Abstract: An asynchronous transfer mode (ATM network and method for operating an ATM network which provides for virtual channel merging of individual user data cells. The ATM network comprises a multiplicity of source stations, wherein each one of the source stations is identified by a source identifier (SID) and is connected to at least one non-merged virtual channel (VC); a first ATM switch having a first input, a second input, and an output, such that the first input is connected to one of the non-merged virtual channels (VCs), the second input is connected to a different one of the non-merged VCs, and the output is connected to a merged VC; and at least one destination station is connected to the merged VC, which maintains a SID allocation table containing each one of the source identifiers (SIDs).

Abstract: There is disclosed, for use in a wireless communication system, an infrastructure comprising 1) a plurality of client base transceiver stations operable to transmit voice and data signals to mobile units within the wireless communication system and to receive voice and data signals from the mobile units; and 2) a base station server coupled to the plurality of client base transceiver stations via a client-server backbone architecture, the base station server operable to transfer the voice and data signals between the plurality of base transceiver stations and an external wired communication system.

Abstract: There is disclosed, for use in a wireless communication system comprising at least one base station operable to communicate with a plurality of mobile units, a power controller for controlling a power consumption of a linear power amplifier in the base station. The power controller comprises: 1) a first power monitor for determining an RF output power level of the linear power amplifier; 2) a second power monitor for determining a primary power level consumed by the linear power amplifier; and 3) a processing circuit operable to determine an actual power ratio of the primary power level and the RF output power level and to adjust the primary power level to maintain the actual power ratio at approximately a selected target power ratio.

Abstract: There is disclosed, for use in an RF amplifier, a biasing circuit for maintaining the quiescent current of an output power transistor at a selected bias level. The biasing circuit comprises a temperature sensor circuit for generating a temperature-sensitive control voltage that varies according to changes in temperature of the output power transistor and a bias voltage generating circuit capable of detecting a variation in the temperature-sensitive control voltage. In response to a detected change in the temperature-sensitive control voltage, the bias circuit adjusts a bias voltage applied to the output power transistor by an amount suitable to offset a change in the selected bias current level caused by a temperature change related to the variation in the temperature-sensitive voltage.

Abstract: There is disclosed, for use in a processing network containing a first node operable to transmit and receive frame relay data and a second node operable to transmit and receive asynchronous transfer mode (ATM) data, a network interface for converting the frame relay data to ATM data comprising: 1) a frame relay interface circuit operable to receive the frame relay data from the first node; 2) an ATM interface circuit operable to transmit the ATM data to the second node; 3) a data bus for coupling the frame relay interface circuit and the ATM interface circuit, the data bus operable to transfer frame payload data from the frame relay interface circuit to the ATM interface circuit; 4) a data traffic controller operable to receive frame header data from the frame relay interface circuit and control transfers of the frame payload data from the frame relay interface circuit to the ATM interface circuit; and 5) a bridge for coupling the data traffic controller to the data bus, the bridge isolating the data traffic

Abstract: A digital feedforward (FF) amplifier system is disclosed for use in an RF transmission system. The digital FF amplifier uses digital signal processing to generate error correction signals that reduce intermodulation distortion caused by saturation of the main power amplifier. The digital signals in the improved FF amplifier may be buffered, if necessary, thereby eliminating the need for delay lines. A main amplification branch includes a digital combiner for summing input digital signals, digital-to-analog converters, RF modulation circuitry and a main power amplifier. An error correction signal branch includes an error correction signal generator, digital-to-analog converters, and RF modulation circuitry. The RF outputs of the main amplification branch and the error correction signal branch are combined to produce an RF output signal with reduced distortion. Optionally, an amplifier characterization branch may be included comprising RF output feedback circuitry and an amplifier model.

Abstract: A communication processor that uses a group of hardware buffer descriptors and a virtual array of buffer descriptors to control the communication ports of the communication processor. The virtual array of buffer descriptors is a data structure stored in a local memory that contains data fields that are similar to the hardware buffer descriptors of the communication processor. The processor swaps data between the hardware buffer descriptors and the virtual array of buffer descriptors to provide “just in time” storage of control and status information used by the communication ports to transmit and receive data.

Abstract: Software inverse multiplexing within an Asynchronous Transfer Mode (ATM) communication network is provided by a first ATM switch receiving a stream of ATM cells over a high bandwidth communication link. A Segmentation and Re-assembly (SAR) module associated with the first ATM switch thereafter reassembles the received ATM cells into corresponding user packets. Control data identifying the sequence of assembled user packets are added to each user packet and de-assembled into corresponding ATM cells. The de-assembled ATM cells are then communicated over a plurality of low bandwidth communication links to a second ATM switch. The second ATM switch receives the transmitted ATM cells over said low bandwidth communications links. A SAR module associated with the second ATM switch thereafter reassembles the received ATM cells into corresponding user packets. Utilizing the enclosed control data, received user packets are re-synchronized into their original sequence.