Abstract: A CMOS device fabricated in a silicon-on-insulator structure and including circuitry and methods in a first embodiment dynamically shifts the threshold voltage of the CMOS device in a receiver to provide improved noise margin and in a second embodiment dynamically matches the threshold voltages in a differential amplifier to correct for manufacturing offset. To dynamically shift the threshold voltage for noise immunity, the back gate or bulk nodes of the devices is shifted through two similar circuits comprised of npn inverters with clamping devices. The back gate of the n device is biased at 0 volts for the maximum Vth and is biased at +1 threshold for the minimum Vth of the device. Only the back gate of the p device is biased at Vdd for the maximum Vth of the device and is biased at 1 Vth below Vdd for the minimum Vth of the device. The Vth of the n device and the p device should be less than the forward bias of the respective source volt junctions to prevent unwanted bipolar currents.

Abstract: A vault controller in an electronic business system includes a dispatcher for servicing browser requests initiated by a user for conducting business with an enterprise or organization using a vault process. The dispatcher further responds to a secure depositor receiving requests from other vault processes running in the controller. The request is in the form a URL containing an application domain/local context and application name. The request is detected and processed by event creator which forms an event object definitive of the request in the URL. An event handler parses the event object and enters a vault system application registry to locate the application in a shared memory. The location of the application is passed to a server pool, which assign a processing thread to handle the request. The thread engages a context manager which decrypts and imports application domain, application function and local context information from external storage to process the request.

Abstract: In a distributed information network, a broker server is coupled to a plurality of child servers and to a plurality of clients in the network. The broker server connects clients to a child server in a queue on a FIFO basis and provides the client with a key identifying the child server. The client provides the server with a copy of its key at the time of the initial service request. Both the child server and the client retain a copy of the other's key upon disconnect. The child server returns to the bottom of the queue after disconnect. On a subsequent client service request, the client includes the child server key in the service request and the broker automatically re-connects the client to the child server wherever S1 may be in the queue, provided the child server is not busy serving other clients. When reconnected, the client send its key to the child server which compares the key to the retained copy of the client key.

Abstract: A system and method to implement callback for unanswered telephone calls in an Internet Telephony Callback system. A calling station and a called station are each connected to the system through a local and remote service provider, respectively, each provider including a voice gateway and callback server. A telephone call originated at the calling station by a calling party is processed by the local service provider and the local callback server generates a control message which accompanies the telephone call. The remote service provider processes and connects the telephone call if answered by the called party and sends a message to delete the control message from the local callback server. If the telephone call is unanswered the remote callback server stores the control message and waits for the called party to initiate a return call. When the return call is initiated, the remote callback server sends a message to the local callback server to extend the return call to the calling party.

Abstract: Secure communication may be conducted between two or more parties over a network, e.g the Internet without prior security arrangements among the parties or agreed to encryption/decryption software. A sending party is connected to a data network through a computer and has access to a communications network, e.g. a public switched telephone network. The sender prepares a file designated, e.g. “X” containing confidential information for secure transmission over the Internet or the like to one or more receivers. In one embodiment, the sender downloads encryption/decryption or “crypto” software stored at a location on the Internet e.g. location “U” in a Uniform Resource Locator (URL). The “crypto” software is written in executable code or an interpretive language such as JAVA. The sender selects a key “K” and encrypts the plain text file “X” into cipher text.

Abstract: A system and method to avoid transmit underruns from a host system to a communication network using an adjustable threshold on a frame basis. The host system includes a device driver, host descriptors and host buffer. The host descriptor define the number of blocks of data to be transferred from the host to the network via a Media Access Control (MAC) device. The MAC device includes a processor, a transmit storage device, and a medium independent interface coupled to the network. The MAC device is connected to the host system via a data bus. A host descriptor is generated for each frame of data transferred by the MAC device from the host to the network. The descriptor is generated by the device driver and provides the MAC processor with a block size of data to be transferred and a threshold in each frame indicating the number of blocks of data to be transferred from the host system to the MAC device to avoid an underrun before transmission to the communication network.

Abstract: In a local area network, a system and a method to detect transmit underruns and retransmit frames between a sending station and a receiving station using a Media Access Control (MAC) device in lieu of a sending processor. The MAC device includes a MAC processor for transmitting data in blocks from a host buffer to a storage device, e.g., RAM for retransmission to the network via a Media Independent Interface (MII) unit. The MAC device includes a transmit logic unit which uses a control word set by the MAC processor to transmit data by frames from the storage device to the network. The transmit logic unit includes pointer control logic to identify the start address of the data and to track the data as read from the storage device to the network. When a transmit underrun occurs, the transmit logic recognizes the condition and resets the pointer logic to the start of the first frame for retransmission to the receiving station.

Abstract: An information retrieval system and method translates a single search request or query across heterogenous databases independent of the database search grammar(s). A client uses a process to express the query in a powerful programming language, i.e., Generalized Query Language (GQL) which has a wide variety of operators to precisely specify the conditions of the query and enable a fused response to be provided by the databases to the query. The process translates the query into phrases contained in a GQL and constructs a complex search query which bridges the gap between the query and the low level of functionality provided in search engines associated with the databases. A search broker receives the GQL query and using a process (i) checks for syntax errors; (2), if correct, parses the complex query into individual search or partial queries and associated logical operations, and (3) forwards the partial queries and operations to the database search engines.

Abstract: An apparatus and method reduces the number of rename registers for a floating point status and control register (FPSCR) in a superscalar microprocessor executing out of order/speculative instructions. A floating point queue (FPQ) receives speculative instructions and issues out-of-order instructions to FPQ execution units, each instruction containing a group identifier tag (GID) and a target identifier tag (TID). The GID tag indicates a set of instructions bounded by interruptible or branch instructions. The TID indicates a targeted architected facility and the program order of the instruction. The FPSCR contains status and control bits for each instruction and is updated when an instruction is executed and committed.

Abstract: A superscalar microprocessor chip includes a core processor with a distributed memory surrounding the perimeter of the processor. The distributed memory is arranged in sub-memory elements, each memory sub-element including check bits for each word stored in the sub-element. The number of check bits for each word is based upon the check bits required for a memory word formed from each word in each memory subelement, the number of ECC bits required for the combined word being less than the total number of bits available in the distributed memory. The difference in ECC bits and available bits provides spare bits which are used to route the ECC bits to ECC circuity positioned within the distributed memory for single error correction and double error detection. The position of the ECC circuity and the layout of the sub-memory elements with respect to the ECC circuitry are arranged to minimize the travel of the ECC bits for data correction or detection purposes, and does not adversely affect processor cycle time.

Abstract: A reactively controlled directive antenna array that has a single central monopole or dipole as a radiating element excited directly by a feed system. A plurality of parasitic elements surround the radiating element and through changing the state of the parasitic impedance causing the antenna to be in an omni directional or beam pointing mode according to whether the parasitic elements are open circuited or short circuited. A computer modem and memory including stored programs control the antenna array in an omnidirectional or directive mode to locate, identify and communicate with nodes in a wireless communication network. A stored table is created in the memory indicating the antenna direction for communicating with each node in the network. Using the stored table, the computer initiates a communication sequence with a selected node, the sequence having the advantages of improved signal sensitivity and angular discrimination for wireless communication systems.

Abstract: A data processing system and method for the correction of address information on mail. The method makes use of a contextual predictive keying method for enabling an operator to read the image of an addressee mailing address and type in a minimum number of keystrokes necessary to sort the mail piece down to the final sorting level at the destination post office.

Abstract: A front cover assembly is provided for use with a touch sensitive display device. The touch sensitive display device includes a display such as a Cathode Ray Tube (CRT) or Liquid Crystal Display (LCD). The front cover assembly has a top cover, an infrared bezel and a piece of glass. The top cover is inserted into a mold along with the piece of glass. The top cover and glass are then held in place by a vacuum while polyurethane is injected to fill the void between the glass and the top cover and the mold. The polyurethane is injected using injection molding techniques. The polyurethane used must have the properties of flexibility, durability and must also be transparent to infrared light. The polyurethane provides a mechanical lock around the glass and top cover and thus the polyurethane compensates for the different rates of expansion and contraction of the glass and the top cover due to temperature variations in the ambient environment.

Abstract: A communications adapter receives and transmits simultaneously packet and/or isochronous data between two interfaces; a network and a host bus system. The adapter stores the isochronous and packet data in receive and transmit queues configured in a FDDI RAM buffer. A controller manages the transfers of the data into and out of the queues. A local bus interacts with the system to provide descriptors of addresses in the system for transfers of data out of the queues to the system or the network. The controller is programmable to provide a variable threshold for the transfer of data between the queues and the system or the network. A systems interface unit handles the transfer of data to/from the system and allows data to bypass the queues and directly access the system or the network.

Abstract: A communications adapter receives and transmits simultaneously packet and/or isochronous data between two interfaces; a network and a host bus system. The adapter stores the isochronous and packet data in receive and transmit queues configured in a FDDI RAM buffer. A controller manages the transfers of the data into and out of the queues. A local bus interacts with the system to provide descriptors of addresses in the system for transfers of data out of the queues to the system or the network. The controller is programmable to provide a variable threshold for the transfer of data between the queues and the system or the network. A systems interface unit handles the transfer of data to/from the system and allows data to bypass the queues and directly access the system or the network.

Abstract: A system and method for passively measuring and correcting ring latency on a token or FDDI ring includes generating bits and token frames in a defined pattern according to the token ring protocol. A passive device coupled to the token ring measures CMIN, the minimum spacing, CMAX, the maximum spacing in bits and calculates Fi the frequency of changes in Cmin and Cmax between successive tokens or a token and a frame on the ring. A latency event vector Li is generated by the passive device. A controller responsive to the latency vector Li corrects the spacing between successive tokens or a token and frame to achieve a constant ring latency regardless of electrical or operational changes on the token ring.

Abstract: A power bus digital communication system reduces power and signal cabling in a space satellite by transformer coupling digital signal sources to power bus circuits, the transformer coupling devices in all power bus circuits being in parallel relation and electrically isolated from a power supply whereby the digital communication sources may communicate among themselves at a DC power level using a square wave modulated according to a Manchester code.

Abstract: A method dynamically changes the bit rate or bandwidth of constant bit rate data structures in an Asynchronous Transfer Mode (ATM) communications environment. The method defines within a data channel a Change indicator (CI) indicative of an end user's request for a bit rate change within said data structures. The Change Indicator is continuously transmitted from a source side to a destination side in the ATM environment, along with the data structures on said data channel. Upon receipt at the destination side of a user's request of a bit rate change, the destination side modifies the value of said Change Indicator. The source side, acknowledges the modification of the value of the Change Indicator, whereby the transmission of data structures continues on the data channel with a new constant bit rate.

Abstract: This method improves the user-friendliness of command-line driven programs by having a correspondence set up between possible commands which may be entered on a command line and a series of Graphic User Interface "buttons". These buttons are graphical symbols that appear on the screen and are selectable via a mouse. A display screen is divided into work areas, one of which is associated with the screen which a user would have seen while using the application program without the invention and a second of which displays an array of "buttons," each of which are associated with commands. When the user selects the specific button with a mouse pointer moving the mouse, the related "command" is identified. A message is then created, the message comprised of the same data that would have been created by the series of keystrokes to spell out that command. The command is passed to the application program, which receives it in the same manner that it would have received input from the keyboard.

Abstract: A hardwired, dynamically reconfigurable counter array counts occurrences of different traffic events having different rates of occurrences monitored on a high speed data network by an Event Driven Interface (EDI). The array includes a plurality of "N" bit counters, where "N" is a binary multiple. The counters are arranged in an array of size "m,n", where "m" is the number of rows and "n" is the number of columns in the array. A signal input is provided to each counter as a first input, each signal being definitive of a specific traffic event occurring on the high speed network. Each counter is connected to the adjacent counter in the column through a multi-terminal logic element, each logic element in a column receives the output of a counter as a first input and provides an output to the succeeding counter as a second input. A counter logic switch responsive to an input signal generates a counter logic vector as an output.