Patents Represented by Attorney Junichi Mimura
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Patent number: 7506233Abstract: An interface circuit includes a selection circuit receiving first and second signals, generating a time division serial signal by selecting one of the first and second signals in response to the voltage level of a clock signal provided from the outside of a semiconductor device, and outputting the time division serial signal to a single input terminal of the semiconductor device via a single signal line, a first holding circuit, which is connected to the terminal for receiving the time division serial signal, for capturing and outputting the first signal of the time division serial signal in response to the rise of the clock signal, and a second holding circuit, which is connected to the terminal for receiving the time division serial signal, for capturing and outputting the second signal of the time division serial signal in response to the fall of the clock signal.Type: GrantFiled: March 15, 2002Date of Patent: March 17, 2009Assignee: Oki Electric Industry Co., Ltd.Inventor: Masanori Yamada
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Patent number: 7443012Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing a conductive substrate having a main surface and a back surface opposite to the main surface, (2) forming at the main surface of the conductive substrate a plurality of first grooves, which are parallel to each other, and forming at the main surface of the conductive substrate a plurality of second grooves, which are parallel to each other, and which are perpendicular to the first grooves, (3) fixing a semiconductor chip to the main surface of the conductive substrate, (4) encapsulating the semiconductor chip with resin by introducing the resin onto the main surface of the conductive substrate, the resin entering into the first and the second grooves and (5) polishing the back surface of the conductive substrate until the resin formed in the first and the second grooves are exposed.Type: GrantFiled: September 12, 2005Date of Patent: October 28, 2008Assignee: Oki Electric Industry Co., Ltd.Inventor: Tadashi Yamaguchi
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Patent number: 7409573Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: GrantFiled: June 17, 2005Date of Patent: August 5, 2008Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
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Patent number: 7309919Abstract: A sealing apparatus for sealing by resin a semiconductor wafer having semiconductor elements on its surface. The apparatus includes an upper mold and a lower mold having an area where the semiconductor wafer is mounted, the lower mold having an uneven surface in the area and a shock absorber under the lower mold.Type: GrantFiled: December 5, 2003Date of Patent: December 18, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Jiro Matsumoto
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Patent number: 7247800Abstract: A module circuit board for a semiconductor device by a solder reflow process includes a plurality of pads on which the semiconductor device to be mounted, a plurality of terminals formed on a side edge of the board, a resist film covering an area between said pads and said terminal on the board, and a barrier formed between said pads and said terminals.Type: GrantFiled: February 11, 2004Date of Patent: July 24, 2007Assignee: Oki Electric Industry Co., Ltd.Inventor: Norio Takahashi
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Patent number: 7115977Abstract: A multi-chip package type semiconductor device includes an insulating substrate having first and second conductive patterns thereon, a first semiconductor chip on the insulating substrate and having a first terminal pad and a relay pad isolated from the first terminal pad. The device further includes a second semiconductor chip on the first semiconductor chip having a second terminal pad. The first semiconductor chip is connected to the first pattern by a first bonding wire. The second semiconductor chip is connected to the second pattern by a second bonding wire, which connects the second pattern to the relay pad, and a third bonding wire, which connects the relay pad to the second terminal pad. The lengths of the first, second and third bonding wire are approximately the same.Type: GrantFiled: September 27, 2001Date of Patent: October 3, 2006Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuru Komiyama, Shinsuke Suzuki
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Patent number: 7109057Abstract: A sealing apparatus for a semiconductor wafer includes an upper mold and a lower mold. The lower mold includes a recess in which the semiconductor wader is placed, and a pot for introducing resin to the recess. The pot is located under a center area of the recess. Thus, when the resin is introduced in the recess, the resin is spread from the center area of the semiconductor wafer toward the peripheral area.Type: GrantFiled: July 25, 2002Date of Patent: September 19, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Jiro Matsumoto
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Patent number: 7029957Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing an SOI substrate, (2) forming a metal layer on the SOI substrate, (3) performing a first anneal treatment to the metal layer at a relatively low temperature in order to transform the metal layer to a first silicide layer, (4) forming an insulating layer on the first silicide layer, and (5) forming a contact hole, which reaches the first silicide layer, in the insulating layer; and (6) performing a second anneal treatment to the silicide layer at a relatively high temperature in order to transform the first silicide layer to a second silicide layer.Type: GrantFiled: July 24, 2003Date of Patent: April 18, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Naokatsu Ikegami
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Patent number: 7002256Abstract: A semiconductor device including a semiconductor substrate having a grid-line area and a chip area, the chip area having a circuit area and a dummy area surrounding the circuit area, circuit patterns formed on the substrate in the circuit area, a first dummy pattern which is formed of the same material as the circuit pattern, formed in the dummy area, the dummy pattern encompassing the circuit area, a first insulating layer formed on an entire surface of the semiconductor substrate, a second insulating layer formed only on the first insulating layer which is formed on the semiconductor substrate and on the circuit patterns; and a third insulating layer formed on the exposed first insulating layer and the second insulating layer.Type: GrantFiled: July 25, 2000Date of Patent: February 21, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Hiroki Nakamura
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Patent number: 7003636Abstract: A memory control circuit includes a watching circuit for observing a first request signal from an external device for accessing to a RAM and a second request signal, which has a priority higher than the first request signal, from a CPU for accessing to the RAM. The memory control circuit further includes a control circuit having an OR gate, an AND gate and a NOR gate. When the first and second request signals are inputted, it is scheduled that an operation based on the second access request signal is performed by the control circuit prior to that based on the first access request signal.Type: GrantFiled: October 15, 2004Date of Patent: February 21, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Yoshikatsu Matsuo
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Patent number: 7001798Abstract: A method of manufacturing a semiconductor device includes the steps of, (1) preparing a conductive substrate having a main surface and a back surface opposite to the main surface, (2) forming at the main surface of the conductive substrate a plurality of first grooves, which are parallel to each other, and forming at the main surface of the conductive substrate a plurality of second grooves, which are parallel to each other, and which are perpendicular to the first grooves, (3) fixing a semiconductor chip to the main surface of the conductive substrate, (4) encapsulating the semiconductor chip with resin by introducing the resin onto the main surface of the conductive substrate, the resin entering into the first and the second grooves and (5) polishing the back surface of the conductive substrate until the resin formed in the first and the second grooves are exposed.Type: GrantFiled: November 12, 2002Date of Patent: February 21, 2006Assignee: Oki Electric Industry Co., Ltd.Inventor: Tadashi Yamaguchi
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Patent number: 6967397Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.Type: GrantFiled: December 30, 2003Date of Patent: November 22, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Kazutoshi Inoue, Mitsuya Ohie
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Patent number: 6938108Abstract: A micro-controller includes a USB control unit, an MC unit having an operation mode and a stop mode and an oscillating circuit, which is commonly used by the USB control unit and the MC unit. The USB control unit includes a watching circuit for watching a condition of a first data and a second data, which is complement data of the first data. The operation of the oscillating circuit is controlled in response to an operation control signal, which is generated by a watching result, and an oscillation control signal whose voltage level is changed in response to the mode of the MC unit.Type: GrantFiled: September 27, 2001Date of Patent: August 30, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuya Ohie, Kyotaro Nakamura, Shuichi Hashidate
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Patent number: 6911719Abstract: A molding equipment for a resin shielding semiconductor device includes a lower platen having a lower cavity, and an upper platen having an upper cavity, and a recess which is adjacent to the upper cavity. A lead frame has an opening serving as a passage of resin. The opening has one end rounded.Type: GrantFiled: July 23, 2003Date of Patent: June 28, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Kazuaki Yoshiike
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Patent number: 6897554Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.Type: GrantFiled: December 30, 2003Date of Patent: May 24, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Kazutoshi Inoue, Mitsuya Ohie
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Patent number: 6895478Abstract: A memory control circuit includes a watching circuit for observing a first request signal from an external device for accessing to a RAM and a second request signal, which has a priority higher than the first request signal, from a CPU for accessing to the RAM. The memory control circuit further includes a control circuit having an OR gate, an AND gate and a NOR gate. When the first and second request signals are inputted, it is scheduled that an operation based on the second access request signal is performed by the control circuit prior to that based on the first access request signal.Type: GrantFiled: February 12, 2002Date of Patent: May 17, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Yoshikatsu Matsuo
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Patent number: 6885094Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.Type: GrantFiled: December 30, 2003Date of Patent: April 26, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Kazutoshi Inoue, Mitsuya Ohie
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Patent number: 6885095Abstract: A MCP semiconductor device includes at least first and second chips, each of which has internal pads and an internal circuit, encapsulated by a sealing material together. The device further includes a test circuit. The test circuit connects each of the internal pads to one of the internal circuits under a normal operation mode of the device, and disconnect between them under a test mode.Type: GrantFiled: December 30, 2003Date of Patent: April 26, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Kazutoshi Inoue, Mitsuya Ohie
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Patent number: 6882056Abstract: A multi-chip package type semiconductor device includes an insulating substrate having first and second conductive patterns thereon, a first semiconductor chip on the insulating substrate and having a first terminal pad and a relay pad isolated from the first terminal pad. The device further includes a second semiconductor chip on the first semiconductor chip having a second terminal pad. The first semiconductor chip is connected to the first pattern by a first bonding wire. The second semiconductor chip is connected to the second pattern by a second bonding wire, which connects the second pattern to the relay pad, and a third bonding wire, which connects the relay pad to the second terminal pad. The lengths of the first, second and third bonding wire are approximately the same.Type: GrantFiled: June 17, 2002Date of Patent: April 19, 2005Assignee: Oki Electric Industry Co., Ltd.Inventors: Mitsuru Komiyama, Shinsuke Suzuki
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Patent number: 6841462Abstract: A semiconductor chip includes a substrate having a main surface, the main surface including a flame-shaped first area, which is along sides of the main surface, and a second area encompassed by the first area, a pad formed in the first area and a bump electrode formed on the pad, and at least one supporting member formed in the second area.Type: GrantFiled: November 21, 2003Date of Patent: January 11, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Naofumi Iwamoto