Abstract: A smart antenna system includes: an antenna array including a plurality of antenna elements, and at least one calibration element; a plurality of transceiver units each having a port coupled with an associated one of the antenna elements, a receive port, and a transmit port; a transceiver calibration unit including a port coupled with the calibration element via a coaxial cable, a receive port, and a transmit port; and signal processing means communicatively coupled with each of the receive ports and the transmit ports of each of the transceiver units, and coupled with the calibration receive port and the calibration transmit port of the calibration unit. A transmitter calibration path associated with each antenna element extends from the transmit port of the associated transceiver unit to the associated antenna element, from the associated antenna element to the calibration element, and from the calibration element to the receive port of the calibration unit.

Abstract: A time division duplex switching circuit provides for selectively coupling signals between an antenna and a front stage transceiver circuit. The switching circuit is operative in a transmit mode and in a receive mode, and includes: a transmitter amplifier having an input and an output; a receiver amplifier having an input and an output; a first circulator including a first port coupled for communication with the front stage transceiver, a second port selectively coupled with the output of the receiver amplifier via a first switching, and a third port selectively coupled with the input of the transmitter amplifier via a second switching; and a second circulator including a first port coupled for communication via the antenna, a second port coupled with the input of the receiver amplifier, and a third port coupled with the output of the transmitter amplifier.

Abstract: A semiconductor memory array and methods therefor is provided herein comprising a substrate; a plurality of memory cell field effect transistors formed on said substrate and being arranged thereon into rows and columns of transistors, each transistor includes a channel region interposed between drain and source regions, and overlaid by a control gate region; a plurality of first diffused elongated regions formed within said substrate that electrically connect in common the drain regions of transistors in respective columns; a plurality of second diffused elongated regions formed within said substrate that electrically connect in common the source regions of transistors in respective columns; and a plurality of elongated conductive line formed over said substrate that electrically connect in common the control gate regions of transistors in respective rows.

Abstract: A charge cooled rotary engine includes a housing, a first end plate, and a second end plate. The housing and end plates combine too define a closed chamber. A rotor disposed within the housing includes three flanks, a cylindrical hub, and a web extending transversely from the hub and joining medial portions of the flanks to the hub. The web, flanks, and hub form rotor cavities on opposite ends of the rotor. Inlets formed in the end plates for receiving fuel/air charge terminate in entry ports facing the closed chamber. Distribution chambers, formed in the end plates adjacent the entry ports, are open to the closed chamber. The entry ports directly communicate with the rotor cavities and are isolated from direct communication with any of the intake, compression, and combustion chambers by the rotor flanks.

Abstract: A semiconductor memory array and methods therefor is provided herein comprising a substrate; a plurality of memory cell field effect transistors formed on said substrate and being arranged thereon into rows and columns of transistors, each transistor includes a channel region interposed between drain and source regions, and overlaid by a control gate region; a plurality of first diffused elongated regions formed within said substrate that electrically connect in common the drain regions of transistors in respective columns; a plurality of second diffused elongated regions formed within said substrate that electrically connect in common the source regions of transistors in respective columns; and a plurality of elongated conductive line formed over said substrate that electrically connect in common the control gate regions of transistors in respective rows.

Abstract: A method for ordering all of the possible hands into a particular sequence is presented. Due to the particular manner in which the hands are ordered and sequenced, any one of the hands can be accessed fairly quickly by the methods provided herein which simplifies complex calculations to table look-up operations. Given a particular hand (the first five cards given to the player in a five-card draw poker), all of the possible hands arising from the particular hand (as a result of the number of cards kept by the player) is iterated and the types of all possible resulting hands tabulated. The combination of hands resulting from the number of cards kept is considered in the iteration. After the iteration is completed, the results obtained is a tabulation of each combination of hands obtained.

Abstract: An active pixel sensing structure includes an array of pixel unit cells each of which an adapted to alternate between a light sensing mode wherein the cell outputs an image signal and a reset mode wherein the cell outputs a reset signal. The image signal is proportional to light incident on the cell, and the reset signal is proportional to a predefined reference potential. An improved readout circuit according to the present invention includes a first sample and hold component for receiving and storing the image signal, and second sample and hold component for receiving and storing the reset signal. A signal amplifier is provided for each sample and hold component. A switching circuit is operable between a first mode and a second mode. In the second mode, the first and second sample and hold components are operatively decoupled from the corresponding signal amplifiers while input terminals of the signal amplifiers are connected to a source of predetermined reference potential.

Abstract: A wave motion detector system for a swimming pool includes a transducer responsive to positive and negative pressure changes in swimming pool water and operative to generate corresponding electrical signals. Comparators are responsive to the electrical signals, and operative to generate a crest signal while the positive pressure exceeds a predetermined positive threshold level, and a trough signal while the negative pressure exceeds a predetermined negative threshold level. A band pass filter prevents electrical signals having a frequency greater than a predetermined upper frequency, and lower than a predetermined lower frequency from passing from the transducer to the comparators. A pulse width discriminator is responsive to the crest signal and the trough signal and is operative to generate a qualified crest signal if the crest signal remains active for a first predetermined time interval, and a qualified trough signal if the trough signal remains active for a second predetermined time interval.