Patents Represented by Attorney, Agent or Law Firm Karin L. Williams, Esq.
  • Patent number: 6836563
    Abstract: A method for receiving and quantizing a data set originating from collected data is provided. The data set has a plurality of dimensions defined by perpendicular axes, and includes a plurality of data points. Each data point has a data characteristic.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: December 28, 2004
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Thomas Patrick Dawson
  • Patent number: 6822288
    Abstract: A trench MOSFET transistor device and a method of making the same.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: November 23, 2004
    Assignee: General Semiconductor, Inc.
    Inventors: Fwu-Iuan Hshieh, Koon Chong So, John E. Amato, Yan Man Tsui
  • Patent number: 6812526
    Abstract: A trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface and methods of making the same.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: November 2, 2004
    Assignee: General Semiconductor, Inc.
    Inventor: Richard A. Blanchard
  • Patent number: 6812874
    Abstract: An apparatus for processing an analog signal includes a programmable signal converter in which a mapping between input voltages and output voltages is loaded into an input-to-output mapping device, e.g., one or more look-up tables. The resulting device has a lower cost, introduces a shorter delay, requires significantly less circuit board real estate, and has a higher operating frequency than the existing devices. An exemplary embodiment includes an analog-to-analog converter disposed in an integrated package or on a single chip integrated circuit that includes an input converter, an input-to-output mapping device and a digital-to-analog converter. The traditional encoding/decoding process on the output of the digital-to-analog conversion is replaced in this embodiment by using the input converter to drive address mapping values in the input-to-output mapping device, e.g., entries in a lookup table, thereby significantly speeding up the process.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: November 2, 2004
    Assignee: Andrew Corporation
    Inventor: Robert Everest Johnson
  • Patent number: 6794251
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. A first layer of polysilicon having a second dopant of the second conductivity type is deposited in the trench. The second dopant is diffused to form a doped epitaxial region adjacent to the trench and in the epitaxial layer. A second layer of polysilicon having a first dopant of the first conductivity type is subsequently deposited in the trench. The first and second dopants respectively located in the second and first layers of polysilicon are interdiffused to achieve electrical compensation in the first and second layers of polysilicon.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: September 21, 2004
    Assignee: General Semiconductor, Inc.
    Inventor: Richard A. Blanchard
  • Patent number: 6794567
    Abstract: Electronic Music Distribution (EMD), wherein music stored as digital files is downloadable by end users from retail computer databases or from Peer to Peer “file sharing” databases such as Napster, has developed rapidly in the recent past as an alternative to the traditional distribution channels for recorded music. While EMD holds great promise as a distribution vehicle, certain limitations exist with regard to the capability of existing distribution models to classify or characterize the audio quality of the files available for download. This limitation is particularly acute in the Peer-to-Peer context where the downloadable database consists of files from a multiplicity of sources. The present invention utilizes an objective measure of audio quality that is, in one embodiment, presented as part of a response to a user or subscriber search query.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: September 21, 2004
    Assignees: Sony Corporation, Sony Music Entertainment, Inc.
    Inventors: David A. Hughes, Matthew A. Carpenter, Phuong L Nguyen
  • Patent number: 6791172
    Abstract: The present invention discloses a power semiconductor device manufactured using a chip-size package. The power semiconductor device includes a die having a first surface and a second surface opposite to the first surface; at least one lead frame, each of the at least one lead frames having a first terminal and a second terminal, the first terminal electrically connected to a corresponding terminal of the first surface or a corresponding terminal of the second surface of the die; an electrically conductive plate electrically connected to a corresponding terminal of the second surface of the die; and a packaging material used to encapsulate the die, one terminal of the lead frame and the electrically conductive plate. The second terminal of each lead frame and a surface of the electrically conductive plate opposite to the surface electrically connected to the second surface of the die are exposed to the outside of the packaging material and lie on the same plane.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: September 14, 2004
    Assignee: General Semiconductor of Taiwan, Ltd.
    Inventors: Shih-Kuan Chen, Ching-Lu Hsu
  • Patent number: 6791561
    Abstract: The present invention provides a method and apparatus for rendering an input video stream as a polygon texture. The method provides process steps to receive the input video data in a Mip Map generator, wherein the Mip Map generator converts the video data to Mip Map data and stores the Mip Map data in a first memory storage device; wherein the first memory storage device is located in a V buffer. The method further includes sending a data set from a Z buffer to V buffer and mapping the data set to RGB values at a texel address in the V buffer memory. The data set includes U, V and Z coordinates, Mip Map level and channel identification data. The V buffer includes a V buffer fetch module that receives the data set from the Z buffer and maps to RGB data within V buffer memory.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: September 14, 2004
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventor: Thomas Dawson
  • Patent number: 6790056
    Abstract: A method for providing a mechanical/electrical interconnection between two circuit boards, and the interconnection components required therefore, include a pin and socket each having a tail portion, a shoulder portion and a head portion. The tail portion of the pin is sized so as to fit into a plated through hole of the first board, the head portion is sized so as to allow an automated device to capture the head portion and to rest on top of the plated through hole when inserted therein, and the shoulder portion is sized in relation to the plated through hole so as to rest inside the plated through hole and to allow a predetermined amount of solder to flow under the head portion and down into the plated through hole, but not as far down as the tail portion, thereby assisting in centering the pin in the through hole.
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: September 14, 2004
    Assignee: Andrew Corporation
    Inventors: Charles J. Buondelmonte, Joseph P. Mendelsohn, Richard William Brown, Min Li, Richard Franklin Schwartz, Sanjay S. Upasani
  • Patent number: 6786218
    Abstract: The use of an intravascular cooling element to induce hypothermia in connection with a medical procedure. According to a first aspect of the present, invention, a coronary bypass procedure is conducted in which a patient's blood is oxygenated with the patient's lungs and in which blood is circulated using the patient's heart or using an intracorporeal pump. The procedure preferably comprises: (a) positioning a heat transfer element in a blood vessel of a patient; (b) cooling the body of the patient to less than 35° C., more preferably 32±2° C., using the heat transfer element; and (c) forming a fluid communicating graft between an arterial blood supply and the coronary artery. The body of the patient is preferably heated to about 37° C. using the heat transfer element subsequent to the step of forming the fluid communicating graft.
    Type: Grant
    Filed: December 7, 2001
    Date of Patent: September 7, 2004
    Assignee: Innercool Therapies, Inc.
    Inventor: John D. Dobak, III
  • Patent number: 6788728
    Abstract: A reverse link modulator modulates the incoming data sequence for the I and Q channels of a wireless device such that the resulting spreading sequence never undergoes a transition through the origin. Consequently, the modulator has a reduced peak-to-average ratio and provides an improved battery life.
    Type: Grant
    Filed: January 5, 2000
    Date of Patent: September 7, 2004
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Mohit K. Prasad, Sam Heidari
  • Patent number: 6781196
    Abstract: A trench DMOS transistor cell is provided that includes a substrate of a first conductivity type and a body region located on the substrate, which has a second conductivity type. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and a conductive electrode is placed in the trench overlying the insulating layer. A source region of the first conductivity type is located in the body region adjacent to the trench. The trench has sidewalls that define a polygon in the plane of the substrate so that adjacent sidewalls contact one another at an angle greater than 90 degrees.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: August 24, 2004
    Assignee: General Semiconductor, Inc.
    Inventors: Koon Chong So, Fwu-Iuan Hshieh, Yan Man Tsui
  • Patent number: 6782056
    Abstract: A method and system for reordering a plurality of DSS data packets stored in a memory is provided that utilizes a memory buffer capable of storing at least one DSS data packet. The last data packet (Pn) is located and moved to the memory buffer. The data packet (Px) that should be located at the location of the last packet (Pn) is moved to fill the space vacated. If the last data packet should be located at the location of Px, then the last but one (Pn−1) packet is located and moved to the memory buffer. The packet (Px′) that should be located at the location of Pn−1 is then moved to the location of Pn−1. The process is repeated until all the data packets are reordered.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: August 24, 2004
    Assignees: Sony Corporation, Sony Electronics, Inc.
    Inventors: Thomas Poslinski, Kim A. Ryal
  • Patent number: 6770548
    Abstract: A Schottky rectifier is provided. The Schottky rectifier comprises: (a) a semiconductor region having first and second opposing faces, with the semiconductor region comprising a cathode region of first conductivity type adjacent the first face and a drift region of the first conductivity type adjacent the second face, and with the drift region having a lower net doping concentration than that of the cathode region; (b) one or more trenches extending from the second face into the semiconductor region and defining one or more mesas within the semiconductor region; (c) an insulating region adjacent the semiconductor region in lower portions of the trench; (d) and an anode electrode that is (i) adjacent to and forms a Schottky rectifying contact with the semiconductor at the second face, (ii) adjacent to and forms a Schottky rectifying contact with the semiconductor region within upper portions of the trench and (iii) adjacent to the insulating region within the lower portions of the trench.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: August 3, 2004
    Assignee: General Semiconductor, Inc.
    Inventors: Fwu-Iuan Hshieh, Koon Chong So
  • Patent number: 6762098
    Abstract: An integrated circuit having a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: July 13, 2004
    Assignee: General Semiconductor, Inc.
    Inventors: Fwu-Iuan Hshieh, Yan Man Tsui, Koon Chong So
  • Patent number: 6750104
    Abstract: A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conductivity type on the substrate and forming at least one trench in the epitaxial layer. At least one doped column having a dopant of a second conductivity type is located in the epitaxial layer, adjacent a sidewall of the trench. The trench is etched using an etchant gas that also serves as a dopant source for the formation of the doped column. For example, if a p-type dopant such as boron is desired, BCl3 may be used as the etchant gas. Alternatively, if an n-type dopant such as phosphorus is required, PH3 may be used as the etchant gas. The dopant present in the gas is incorporated into the silicon defining the surfaces of the trench. This dopant is subsequently diffused to form the doped column surrounding the trench.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: June 15, 2004
    Assignee: General Semiconductor, Inc.
    Inventors: Richard A. Blanchard, Fwu-Iuan Hshieh
  • Patent number: 6751713
    Abstract: A method and system for decoding a transport stream are disclosed. In one embodiment, the method includes receiving a system information table in the transport stream, reading an activation time from the system information table, storing the table in a memory without activating values contained in the system information table, determining when the activation time is reached, and activating the values contained in the system information table when the activation time is reached. An advantage of the present invention is that the program and system information tables can be transmitted less frequently and still allow the receiver to execute the acquired “next” tables in a timely manner, once the tables have been received for the first time and their activation times have arrived. Another advantage of the present invention is its backward compatibility with the existing protocol formats, because the present invention requires no syntactic modification to the existing table formats.
    Type: Grant
    Filed: June 5, 2000
    Date of Patent: June 15, 2004
    Assignees: Sony Corporation, Sony Electronics
    Inventor: Zicheng Guo
  • Patent number: 6748561
    Abstract: A method and apparatus is provided for interleaving and de-interleaving frame symbols using a single memory buffer. Input frame symbols are read out in an interleaved sequence (or de-interleaved sequence) on a symbol by symbol basis. Frame symbols following the input frame symbols are written into memory locations from where the input frame symbols were read.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: June 8, 2004
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Mohit K. Prasad
  • Patent number: 6740951
    Abstract: A Schottky rectifier includes a semiconductor structure having first and second opposing faces each extending to define an active semiconductor region and a termination semiconductor region. The semiconductor structure includes a cathode region of the first conductivity type adjacent the first face and a drift region of the first conductivity type adjacent the second face. The drift region has a lower net doping concentration than that of the cathode region. A plurality of trenches extends from the second face into the semiconductor structure and defines a plurality of mesas within the semiconductor structure. At least one of the trenches is located in each of the active and the termination semiconductor regions. A first insulating region is located adjacent the semiconductor structure in the plurality of trenches. A second insulating region electrically isolates the active semiconductor region from the termination semiconductor region.
    Type: Grant
    Filed: May 22, 2001
    Date of Patent: May 25, 2004
    Assignee: General Semiconductor, Inc.
    Inventors: Yan Man Tsui, Fwu-Iuan Hshieh, Koon Chong So
  • Patent number: 6734495
    Abstract: A DMOS device is provided which is equipped with a floating gate having a first and second electrode in close proximity thereto. The floating gate is separated from one of the first and second electrodes by a thin layer of dielectric material whose dimensions and composition permit charge carriers to tunnel through the dielectric layer either to or from the floating gate. This tunneling phenomenon can be used to create a threshold voltage that may be adjusted to provide a precise current by placing a voltage between a programming electrode and the body/source and gate electrode of the device.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: May 11, 2004
    Assignee: General Semiconductor, Inc.
    Inventor: Richard A. Blanchard