Abstract: Within an Electronic Design Automation (EDA) tool, a method of macro inference can include translating a hardware description language (HDL) template into a macro template and translating a circuit design into a format corresponding to the macro template. The method further can include matching a portion of the translated circuit design with the macro template and replacing the portion of the circuit design matching the macro template with a macro associated with the macro template. The resulting updated circuit design is then output, e.g., to a user, a computer file, or another EDA tool.
Type:
Grant
Filed:
April 18, 2007
Date of Patent:
March 23, 2010
Assignee:
Xilinx, Inc.
Inventors:
Jérôme Bertrand, Nicolas Leignel, Thomas Vuillermet