Abstract: A semiconductor die package is disclosed. The semiconductor die package comprises a metal substrate, and a semiconductor die comprising a first surface comprising a first electrical terminal, a second surface including a second electrical terminal, and at least one aperture. The metal substrate is attached to the second surface. A plurality of conductive structures is on the semiconductor die, and includes at least one conductive structure disposed in the at least one aperture. Other conductive structures may be disposed on the first surface of the semiconductor die.

Abstract: A field transistor for electrostatic discharge (ESD) protection and method for making such a transistor is described. The field transistor includes a gate conductive layer pattern formed on a field oxide layer. Since the gate conductive layer pattern is formed on the field oxide layer, a thin gate insulating layer having a high possibility of insulation breakdown is not used. To form an inversion layer for providing a current path between source and drain regions, a field oxide layer is interposed to form low concentration source and drain regions overlapped by the gate conductive layer pattern.

Abstract: The present invention extends to methods, systems, and computer program products for iteratively and interactively searching for information. Embodiments of the invention can provide a user with relevant location-specific information in response to a query from the user. Provided information can also be relevant to a user's predicted future behavior. As context for a user is obtained and/or accumulated, such as, for example, through an interactive query dialogue, the probability of providing relevant information in response to a query from the user increases.

Abstract: Standoff structures that can be used on the die backside of semiconductor devices and methods for making the same are described. The devices contain a silicon substrate with an integrated circuit on the front side of the substrate and a backmetal layer on the backside of the substrate. Standoff structures made of Cu of Ni are formed on the backmetal layer and are embedded in a Sn-containing layer that covers the backmetal layer and the standoff structures. The standoff structures can be isolated from each other so that they are not connected and can also be configured to substantially mirror indentations in the leadframe that is attached to the Sn-containing layer. Other embodiments are described.

Abstract: Semiconductor packages that contain multiple stacked chips that are embedded in a pre-molded carrier frame and methods for making such semiconductor packages are described. The semiconductor packages contain a full land pad array and multiple chips that are stacked vertically. The land pad array contains inner terminals that are formed by first stud bumps that are located on a lower die. The land pad array also contains middle terminals that are formed by first conductive vias in a first molding layer embedding the first die. The first conductive vias are connected to second stud bumps that are located on a second die that is embedded in a second molding layer. The second molding layer contains second conductive vias that are connected to a carrier frame, the bottom of which forms the outer terminals of the land pad array.

Abstract: An aircraft boarding apparatus has a passenger bridge that has a confinement structure coupled to the second passenger bridge. The confinement structure exerts a ground-anchoring effect on the second passenger bridge to offset the ultralight configuration of the passenger bridge.

Abstract: Provided are a power device package coupled to a heat sink using a bolt and a semiconductor package mold for fabricating the same. The power device package includes: a substrate; at least one power device mounted on the substrate; a mold member sealing the substrate and the power device; and at least one bushing member fixed to the mold member to provide a through hole for a bolt member for coupling a heat sink to the mold member.

Abstract: Wafer level embedded and stacked die power system-in-package semiconductor devices, and methods for making and using the same, are described. The methods include placing a first side of a substrate frame, which includes through cavity and an adjacent via, on a carrier. A first side of a component selected from an active device and a passive device can be placed on the carrier, within the cavity. A perimeter of the cavity can be attached to a perimeter of the component. Material at a second side of the substrate frame can be removed so the via extends from the frame's first side to the frame's second side. The substrate frame and component can then be removed from the carrier so that routing can be distributed between the first side of the frame and the first side of the component to electrically connect the component with the via. Other embodiments are described.

Abstract: A system and method of integrating electromagnetic microsensors into interventional endovascular devices such as guidewires for tracking guidewires within vessels of the body with the use of a surgical navigation system.

Abstract: Semiconductor packages that contain isolated, stacked dies and methods for making such devices are described. The semiconductor package contains both a first die with a first integrated circuit and a second die with a second integrated circuit that is stacked onto the first die while also being isolated from the first die. The first and second dies are connected using an array of metal connectors containing both a base segment and a beam segment extending over the first die and supporting the second die. This configuration can provide a thinner semiconductor package since wire-bonding is not used. As well, since the integrated circuit devices in the first and second dies are isolated from each other, local heating and/or hot spots are diminished or prevented in the semiconductor package. Other embodiments are also described.

Abstract: An electrical element can be attached and electrically connected to a substrate by a conductive adhesive material. The conductive adhesive material can electrically connect the electrical element to a terminal or other electrical conductor on the substrate. The conductive adhesive material can be cured by directing a flow of heated gas onto the material or by heating the material through a support structure on which the substrate is located. A non-conductive adhesive material can attach the electrical element to the substrate with a greater adhesive strength than the conductive adhesive. The non-conductive adhesive material can also be cured by directing a flow of heated gas onto the material or by heating the material through the support structure on which the substrate is located. The non-conductive adhesive material can cover the conductive adhesive material.

Abstract: An image of an array of probes is searched for alignment features. The alignment features are then used to bring contact targets and the probes into contact with one another. The alignment features may be a feature of one or more of the tips of the probes. For example, such a feature may be a corner of one of the tips. An array of probes may be formed to have such alignment features.

Abstract: Probes of a probe card assembly can be adjusted with respect to an element of the probe card assembly, which can be an element of the probe card assembly that facilitates mounting of the probe card assembly to a test apparatus. The probe card assembly can then be mounted in a test apparatus, and an orientation of the probe card assembly can be adjusted with respect to the test apparatus, such as a structural part of the test apparatus or a structural element attached to the test apparatus.