Abstract: A switch matrix for telecommunication including change-over switches which can be used for both analog and digital signal transmission. Each change-over switch includes a selector circuit, an input and an output stage. The output stage generally includes two transistors coupled in a push-pull arrangement which are connected directly to the supply voltage allowing the capacitive load of the switch to be charged or discharged rapidly. Also, the Miller effect of the internal base-collector capacitance is absent. Consequently, a large frequency range (to approximately 3 GHz) is realized for analog use, and a switch rate of approximately 2 Gb/s is attainable for digital use.

Abstract: In an ISDN network, terminals connected to an S-bus (4) are fed via this S-bus (4) by a d.c. supply arrangement (6, 7, 20). The d.c. supply arrangement comprises a main supply unit (7) and an emergency supply unit (6) which are coupled with opposite polarity to the S-bus (4) via a coupling circuit (20). Consequently, the emergency supply unit (6) needs to supply only those terminals which are also made suitable for voltages with opposite polarity, and which generally present only elementary telecommunications functions. An electrically arranged coupling circuit (20) includes a monitoring circuit which monitors the value of the main supply unit output voltage and inhibits the output from the main supply unit and connects the emergency supply unit when the output voltage drops below a predetermined threshold.

Abstract: Decoding unit for CMI-encoded input signals. A signal having 0/1 transitions is first derived from a signal. A 0/1 transition occurs in a CMI-signal as the result of encoding a binary zero or two consecutive binary ones. In the latter case the 0/1 transition is preceded two bits earlier by a 1/0 transition. By deriving a signal having 1/0 transitions, delaying this signal by two bit intervals and by comparing it to the first signal, the 0/1 transitions corresponding to a binary zero are then accurately detected. The resultant signal can easily be extended by one bit period, so that independent of any phase inversions of the read clock, the appropriate binary information is always generated.

Abstract: Signals derived from a moving shuttle table are utilized to trigger a cavity-dumped YAG laser whose output pulses are directed to machine successive lines of an iron oxide film in a spot-by-spot manner. Machining of the film to form a high-quality reticle requires that the amplitude of the laser output pulses be maintained relatively constant even in the presence of mechanical vibrations and electrical noise which ordinarily tend to produce large fluctuations in the output power of the laser. This is achieved by interposing a phase-locked loop between the output of the shuttle table and the input of the laser. In addition, the loop enhances the machining operation by providing a capability to easily multiply the repetition rate of the pulses derived from the table.

Abstract: Integrated circuit mask patterns are laser machined by mounting substrates on a support that is periodically stepped in a y direction after each scan by a laser writing beam in an x direction. X-direction scanning is accomplished by mounting a mirror on a carriage that reciprocates by rebounding between two displaced coil springs. A coding laser beam is reflected from the carriage through a stationary code plate, comprising alternate transparent and opaque stripes, to monitor the position of the carriage and to control the modulation of the writing beam.

Abstract: High-resolution sputter etching of a relatively thick layer (of, for example, gold) by directly utilizing a relatively thin layer of resist as a sputter-etching mask is often not feasible. In such a case, it is known to use a sputter-etching mask made of an etch-resistant material such as titanium interposed between the resist and the relatively thick layer. In accordance with the invention, patterning of the titanium is achieved by a technique of sputter etching in a halocarbon atmosphere.

Abstract: In a micrographics system of the type in which holes are machined in a thin film by means of a laser (see, for example, reissue U.S. Pat. No. 28,375 of D. Maydan, M. I. Cohen and R. E. Kerwin, granted Mar. 25, 1975), it is advantageous that the laser be a solid-state unit of the stripe-geometry double-heterostructure type. But the optical output beam of such a laser typically exhibits astigmatism and an elliptical cross-section. To assure high-quality machining of the film, it is important that the astigmatic nature of the beam be corrected and, in addition, that the beam be converted to one having a circular cross-section. As described herein, this is accomplished by means of an inexpensive and easily adjustable compact array of optical components that are relatively insensitive to beam-steering and to certain filamentation effects that may occur in the laser.

Abstract: In semiconductor integrated circuits, piezoresistance is recognized as a factor affecting production yield and circuit performance. Current flow in a circuit resistor is aligned with one of the <100> family of equivalent directions. When current is flowing along such a direction the change in resistance due to any combination of stress components is at a minimum. Additionally, variation of resistance due to stress and strain may be reduced by an increase of the total impurity concentration in a resistor.

Abstract: In an automated inspection procedure, corresponding elements from all the patterns lying along a row of a replicated-pattern mask or wafer are successively imaged onto a storage medium in an interleaved way. At the completion of an inspection cycle, sets of corresponding elements from all the patterns in the row are respectively arrayed in the storage medium in a side-by-side fashion.

Abstract: A method of making an oxide isolated integrated circuit structure is simplified by forming a first level metallization pattern without the conventional underlying insulating layer and without the need for restricting the size of the metallization to the size of the semiconductor regions to be contacted. Portions of the first level metallization pattern can extend on the oxide isolation region to contact two otherwise isolated semiconductor zones. Additionally, subsequent to the formation of the oxide isolation regions and the first level metallization, an intermediate dielectric masking pattern is formed so the combination of the first level metallization, the oxide isolation regions and the masking pattern defines zones for the introduction of impurities. Further, the masking pattern alone is used to provide contact holes for a subsequently formed second level metallization pattern.

Abstract: A Schottky barrier contact includes a thin layer of high carrier concentration impurities ion implanted over the contact surface of the semiconductor. This reduces the electronic barrier height, increases the tunneling component, and thus reduces the forward-bias turn-on voltage of the diode. The implanted layer has a carrier concentration at least ten times that of the semiconductor substrate, and a thickness smaller than the width of the inherent depletion region resulting from the internally generated electric field at the metal-semiconductor interface. An implanted layer of the opposite conductivity type raises the barrier height.

Abstract: A logic gate circuit includes a resistance divider input to the base of an input transistor and a multiple emitter output transistor in an emitter follower configuration. The circuit has favorable switching speed and power dissipation characteristics and reduces the effect of both capacitive loading and series resistance in signal interconnections. An efficient layout of one such logic circuit has intercell wiring channels formed across the circuit and has the inputs and outputs of the circuit arranged in two lines each of which crosses perpendicular to the wiring channels.

Abstract: Spurious modes related to the slow shear mode in an X-cut lithium tantalate crystal are suppressed and/or eliminated by reducing the ratio of plate dimension along the slow shear direction (y') to the dimension along the X direction. Undesired modes associated with the flexural family of modes can be separated in frequency from the desired, fast shear mode by the "proper" ratio of plate dimension along the fast shear direction (z') to the dimension along the X axis.

Abstract: An apparatus and a method for regenerating charge packets representing logical information in a charge transfer device uses a pattern of field plate electrodes and impurity zones to perform arithmetic operations. To regenerate a charge packet it is first multiplied by a factor dependent upon transfer imperfections. Then an amount of charge representing a logical 0 is substracted from the charge packet. Finally, the magnitude of the charge packet is limited to the amount of charge representing a logical 1.

Abstract: A logic gate circuit includes parallel drive of an output transistor and an inverter transistor by an input transistor. The inverter transistor then drives an active pull-up transistor which improves switching speed. The parallel drive of the invention allows the use of the active pull-up transistor without requiring a change in circuit voltage levels.

Abstract: Photolithographic techniques are employed to fabricate hemispherical or semicylindrical microlenses on the end surfaces of optical fibers. The power coupling efficiency between junction lasers and fibers is thereby significantly increased.