Abstract: A method of fabricating a semiconductor device including forming a plurality of gate structures on a semiconductor substrate, forming a plurality of impurity regions in the semiconductor substrate at sides of the gate structures, forming a dielectric layer on the semiconductor substrate having the gate structures, forming contact holes by etching the dielectric layer to expose parts of the impurity regions at sides of the gate structures, directly implanting impurity ions into the exposed parts of the impurity regions via the contact holes by using the gate structures as ion implanting masks, wherein the impurity ions prevent impurities doped in the impurity regions from diffusing to channel regions of the gate structures, and forming conductive plugs in the contact holes.

Abstract: A fuel reformer, includes: a reformer burner, which generates a flame in a reforming pipe disposed to surround at least the flame of the reformer burner, the reforming pipe being filled with a reforming catalyst and having corrugated portions on a surface facing the reformer burner and a bottom surface of the reforming pipe disposed adjacent to the flame in which a flame blocking member is disposed between the flame of the reformer burner and the reforming pipe to isolate the flame of the reformer burner from the reforming pipe.

Abstract: A photocurable pressure-sensitive adhesive (PSA) composition includes an acrylic PSA binder, the acrylic PSA binder including at least one fluoro group in an amount of about 6 mol % to about 30 mol % based on a total amount of the acrylic PSA binder, a thermal curing agent, and a photoinitiator.

Abstract: A monopolar membrane electrode assembly (MEA) for a fuel cell, for example, includes: an electrolyte membrane; anode and cathode electrodes formed on opposite surfaces of the electrolyte membrane, respectively; current collecting bodies that form electrical paths of electricity generated from an electricity generation reaction between the anode and cathode electrodes and the electrolyte membrane; and sensing elements to measure changes in operation state conditions during electricity generation and electrical connection. Since temperature and fuel concentration in the monopolar MEA having the above structure are detected on a real time basis, appropriate action can be taken whenever an abnormal operation thereof is detected.

Abstract: A plasma display panel includes a pair of substrates facing each other, barrier ribs defining discharge cells between the pair of substrates, sustain electrodes between the pair of substrates, the sustain electrodes including second bus electrodes along a first direction, the second bus electrodes being on the barrier ribs, scan electrodes between the pair of substrates, the scan electrodes including first bus electrodes along the first direction, the first bus electrodes being positioned between adjacent second bus electrodes, address electrodes between the pair of substrates, the address, scan, and sustain electrodes being configured to generate discharge in the discharge cells, and phosphors in the discharge cells, the phosphors being configured to emit light by the discharge.

Abstract: An organic light emitting display device includes a substrate, a plurality of pixels on the substrate having a first region configured to emit light and a second region configured to transmit external light, a plurality of pixel circuit units, a plurality of first electrodes, a first organic layer on the plurality of first electrodes, a second organic layer on the first organic layer, the second organic layer including an emission layer, a third organic layer on the second organic layer, the third organic layer being positioned in the first region and outside a central portion of the second region, and a second electrode having a first portion only on the third organic layer.

Abstract: A method of forming an active region structure includes preparing a semiconductor substrate having a cell array region and a peripheral circuit region, forming upper cell mask patterns having a line shape in the cell array region, forming first and second peripheral mask patterns in the peripheral circuit region, the first and second peripheral mask patterns being stacked in sequence and covering the peripheral circuit region, and upper surfaces of the upper cell mask patterns forming a step difference with an upper surface of the second peripheral mask pattern, forming spacers on sidewalls of the upper cell mask patterns to expose lower portions of the upper cell mask patterns and the second peripheral mask pattern, and removing the lower portions of the upper cell mask patterns using the spacers and the first and second peripheral mask patterns as an etch mask.

Abstract: An optics block includes a substrate having first and second opposing surfaces, the substrate being a first material, a plurality of through holes extending in the substrate between the first and second opposing surface, a second material, different than the first material, filling a portion of the through holes and extending on a portion of the first surface of the substrate outside the through holes, and a first lens structure in the second material and corresponding to each of the through holes.

Abstract: A method of manufacturing a non-volatile memory device providing a semiconductor layer in which a cell region and a peripheral region are defined, sequentially forming a first insulating layer, a first conductive layer, a second insulating layer, and a second conductive layer on the cell region and the peripheral region, forming a trench for exposing a portion of the first conductive layer of the peripheral region, wherein the trench is formed by removing portions of the second conductive layer and the second insulating layer in the peripheral region, performing a trimming operation for removing portions of the second conductive layer and the second insulating layer of the cell region, forming a spacer on a side surface of the trench, and forming a silicide layer that is electrically connected to the first conductive layer, wherein the silicide layer is formed by performing a silicidation process on the spacer.

Abstract: A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer through the opening.

Abstract: A method of joining a flexible layer and a support includes forming a first metal layer on one surface of the flexible layer, forming a second metal layer on one surface of the support, cleaning the first metal layer and the second metal layer, and joining the first metal layer to the second metal layer, such that the first metal layer is between the flexible layer and the second metal layer.

Abstract: A compound for filling small gaps in a semiconductor device, a composition for filling small gaps in a semiconductor device, and a method of fabricating a semiconductor capacitor, the compound including hydrolysates prepared by hydrolysis, in the presence of an acid catalyst, of compounds represented by Formulae 1, 2, and 3: [RO]3Si—[CH2]nR???(1) wherein, in Formula 1, n is an integer from 0 to about 10, and R and R? are each independently a hydrogen atom, a C1-C12 alkyl group, or a C6-C20 aryl group; HOOC[CH2]nR2Si—O—SiR?2[CH2]nCOOH??(2) wherein, in Formula 2, each n is independently an integer from 0 to about 10, and R and R? are each independently a C1-C12 alkyl group or a C6-C20 aryl group; and R3Si—O—X??(3) wherein, in Formula 3, X is R? or SiR?3, and R and R? are each independently a C1-C12 alkyl group or a C6-C20 aryl group, or a polycondensate prepared by polycondensation of the hydrolysates represented by Formulae 1, 2, and 3.

Abstract: An electrode composition includes a metal in an amount of about 52% to about 62% by weight of the composition, a glass insulation material in an amount of about 5% to about 7% by weight of the composition, a coloring agent in an amount of about 3% to about 9% by weight of the composition, and a vehicle.

Abstract: A plasma display panel including a first substrate and a second substrate, the first substrate having an inner surface facing the second substrate, at least one dark-colored visible ray absorbing layer on the inner surface of the first substrate, at least one discharge sustaining electrode pair on the visible ray absorbing layer, a first dielectric layer on the discharge sustaining electrode pair, an address electrode on the second substrate and disposed in a direction crossing the discharge sustaining electrode pair, a second dielectric layer on the address electrode, barrier ribs disposed between the first substrate and the second substrate and defining a plurality of discharge cells, and a phosphor layer coated in the discharge cells.

Abstract: A method for correcting a position error of a lithography apparatus comprises inputting position data of exposure pattern, irradiating laser light onto a position reference mask from a position measurement laser system, calculating actual position data of the laser light irradiated onto the position reference mask, and comparing the position data of the exposure pattern with the actual position data of the laser light irradiated onto the position reference mask. With this method, circuit patterns can be accurately formed at predetermined positions on a photomask, and the circuit patterns on the photomask can be accurately formed at predetermined positions on a wafer.

Abstract: A programming method for a non-volatile memory device includes performing a programming operation to program memory cells, when the programmed memory cells are determined to include memory cells that failed to be programmed and when a current program loop is a maximum program loop, determining whether a number of the memory cells that failed to be programmed corresponds to a number of memory cells that can successfully undergo ECC (error checking and correction), when the number of the memory cells that failed to be programmed is less than the number of the memory cells that can successfully undergo ECC, reading data so as to determine whether a number of error bits of the memory cells that failed to be programmed can successfully undergo ECC, and, when the memory cells that failed to be programmed can successfully undergo ECC, ending a programming operation.

Abstract: An organic light emitting display apparatus including a plurality of pixels, wherein each pixel includes a first electrode, a second electrode facing the first electrode, and an intermediate layer disposed between the first and second electrodes and including a plurality of layers including a light emitting layer, at least two pixels adjacent in a first direction form a pixel group, and at least one of the layers of the intermediate layer of the at least two adjacent pixels of the pixel group is integrated, and a distance between pixels in the pixel group is smaller than a distance between adjacent pixel groups.

Abstract: A method of manufacturing an organic light emitting display device includes providing a substrate, the substrate including a first electrode on which a first photosensitive layer is formed, a second electrode on which a second photosensitive layer is formed, and an exposed third electrode, coating an organic layer on the substrate, and carrying out an ashing process to remove the organic layer and the second photosensitive layer and to partially remove the first photosensitive layer so as to avoid exposing the upper surface of the first electrode.

Abstract: A data transceiver system may include an error corrector. The error corrector may include a plurality of delay units, each delay unit being configured to delay a corresponding data signal among a plurality of data signals by a time in response to a corresponding delay code among a plurality of delay codes and outputting the delayed data signal, an error detector configured to receive the plurality of delay codes, determine whether an error has occurred, and output an error signal according to the determination in a data frame lock operation, and a delay controller configured to set initial values of the plurality of delay codes to a predetermined value, vary and output each of the plurality of delay codes in response to a lock signal, and reset initial values the plurality of delay codes in response to the error signal in the data frame lock operation.

Abstract: Methods for operating a nonvolatile memory device including multi-level cells configured to store at least n logic states, where n is equal to or greater than four are provided. The methods may include selecting at least one read voltage for a read operation based on information set at a portion of an address of the respective one of the multi-level cells, and determining multi-level data stored in the respective multi-level cell using the at least one selected read voltage.