Patents Represented by Law Firm Lowhurst & Aine
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Patent number: 3999124Abstract: A method of and apparatus for determining when an unknown quantity is within a desired range of a reference quantity. The apparatus includes a dual slope integrator which integrates the reference quantity and the unknown quantity and discharges the resultant integrated levels. By integrating the reference quantity at least once and the unknown quantity at least twice for three different time periods which differ from one another by amounts which are proportional to the desired range, a comparison of the discharge times of the resultant integrated levels will provide an indication of whether the unknown quantity is within the desired range, when the desired range is a percentage of the value of the reference quantity.Type: GrantFiled: March 24, 1975Date of Patent: December 21, 1976Assignee: Romilly John SimmsInventor: Jerry D. Haney
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Patent number: 3995803Abstract: An injection molded plastic foldable bicycle basket includes a front and a rear sidewall hinged to a pair of centrally hinged end walls and closed on the bottom by a hinged bottom wall. The walls are hinged together in such a way that the bottom wall of the basket folds up against the inside of the rear sidewall and the two centrally hinged end walls fold inwardly to collapse the basket into a flat package. A pair of pivotable hooks are provided for hooking the rear wall to the bicycle handlebars and a hinged strut is affixed to the bottom of the rear sidewall for supporting the basket from the headbar of a bicycle. A pair of retractable tote handles are slidably coupled to the front and rear sidewalls for toting of the basket.Type: GrantFiled: September 3, 1974Date of Patent: December 7, 1976Inventor: Mark D. Uitz
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Patent number: 3995232Abstract: An integrated circuit oscillator includes a timing circuit and a bistable circuit for controlling the timing circuit. The timing circuit includes a capacitor and a pair of field effect transistors (FET), one of which is employed for charging the capacitor and the other of which is employed for discharging the capacitor. A first stage having a relatively low trip voltage is responsive to a low level of charge on the capacitor for actuating the bistable circuit to a first state and a second stage having a relatively high trip voltage is responsive to a high level of charge on the capacitor for actuating the bistable circuit to a second state. The charging and discharging FET's are rendered conductive in response to the first and second states, respectively, of the bistable circuit, such that the capacitor is both charged and discharged over relatively long time periods.Type: GrantFiled: May 2, 1975Date of Patent: November 30, 1976Assignee: National Semiconductor CorporationInventor: Ronald C. Laugesen
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Patent number: 3988689Abstract: A circuit for cancelling the offset voltage of a signal amplifier includes a second amplifier and a third amplifier connected to the outputs of the signal amplifier and the second amplifier. A capacitor is connected between the inputs of the second amplifier for storing the offset voltages of the amplifiers thereon. A switch connects the output of the third amplifier to the capacitor and a switch connects the inputs of the signal amplifier together during offset correction. When the offset voltages are stored on the capacitor, the switches open to permit signal amplification and cancellation of the offset voltages. In a second embodiment, a second capacitor stores the instantaneous amplitude of the signal being amplified and supplies it to an input of the second amplifier such that a discontinuity will not appear in the circuit output during offset correction.Type: GrantFiled: February 7, 1975Date of Patent: October 26, 1976Assignee: National Semiconductor CorporationInventors: Sam S. Ochi, Adib R. Hamade
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Patent number: 3987924Abstract: A plastic container includes a pair of molded plastic end wall structures affixed to opposite end edges of an intervening wall structure having generally parallel tubular reinforcing rib portions formed as by extrusion. A plurality of prongs project outwardly of the end wall structures in registration with the open ends of the tubular reinforcing ribs for affixing the end wall structures to the intervening wall structure. In one embodiment, thermally insulative plastic foam is affixed to the end, side walls and lid of the box to provide a thermally insulated container. A lug box, a lettuce box, an insulated flower box, and a strawberry box are specifically shown.Type: GrantFiled: July 25, 1975Date of Patent: October 26, 1976Inventor: Mark O. Uitz
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Patent number: 3987304Abstract: In an infrared laser optoacoustic spectrometer, the optoacoustic cell is acoustically isolated from a flowing stream to be analyzed, such as the output stream of a retention time chromatograph, by means of mufflers disposed upstream and downstream of the optoacoustic cell.Type: GrantFiled: February 20, 1975Date of Patent: October 19, 1976Assignee: Diax CorporationInventor: Lloyd B. Kreuzer
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Patent number: 3984082Abstract: In a self-stowing motorized jack, a pair of elongated axially telescoping members are arranged to be driven lengthwise relative to each other to lift the vehicle to which they are attached, and when retracted, to move into a self-stowing position. The telescoping members are pivoted at one end to the vehicle to be lifted or leveled. A cam is affixed to the vehicle and a cam follower is affixed to a retractable one of the telescoping members of the jack so that the cam follower, when retracted into engagement with the cam causes the retracted telescoping members to pivot about the pivot into a stowed horizontal position. Automatic latches are arranged for latching the telescoping jack members in both the stowed and lifting positions.Type: GrantFiled: April 28, 1975Date of Patent: October 5, 1976Inventor: Richard W. Boettcher
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Patent number: 3983620Abstract: The method for fabrication of a self-aligned gate CMOS structure which employs no additional masking steps as compared to the standard CMOS fabrication process, this improved process providing the advantages of self-alignment between the N+ and P+ source and drain diffusions with respect to their gate regions, and metal contact openings which do not overlap the edges of the P+ or N+ source and drain regions. The self-aligning gate region is defined by a silicon nitride gate layer. Several embodiments of the novel process are described.Type: GrantFiled: May 8, 1975Date of Patent: October 5, 1976Assignee: National Semiconductor CorporationInventor: Gregorio Spadea
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Patent number: 3984703Abstract: The input of the Schmitt trigger is applied in parallel to the gates of a plurality of stacked MOS transistors. The stacked transistors are connected with their respective source and drain electrodes in series with a source of potential and with the drain electrode of a p channel transistor being connected to the adjacent drain electrode of an n channel transistor to define an output node on which the output hysteresis signal is derived. Upper and lower trip point reference potentials are established on the respective source electrodes of said output node defining p and n channel transistors. At least one of the trip point reference potentials is gated to the respective source electrode as a function of the state of the output, i.e., whether the output is high or low.Type: GrantFiled: June 2, 1975Date of Patent: October 5, 1976Assignee: National Semiconductor CorporationInventor: John M. Jorgensen
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Patent number: 3983398Abstract: A fan-shaped beam of penetrating radiation, such as X-ray or .gamma.-ray radiation, is directed through a slice of the body to be analyzed to a position sensitive detector for deriving a shadowgraph of transmission or absorption of the penetrating radiation by the body. A number of such shadowgraphs are obtained for different angles of rotation of the fan-shaped beam relative to the center of the slice being analyzed. The detected fan beam shadowgraph data is reordered into shadowgraph data corresponding to sets of parallel paths of radiation through the body. The reordered parallel path shadowgraph data is then convoluted in accordance with a 3-D reconstruction method by convolution in a computer to derive a 3-D reconstructed tomograph of the body under analysis. In a preferred embodiment, the position sensitive detector comprises a multiwire detector wherein the wires are arrayed parallel to the direction of the divergent penetrating rays to be detected.Type: GrantFiled: November 29, 1974Date of Patent: September 28, 1976Assignee: The Board of Trustees of Leland Stanford Junior UniversityInventor: Douglas P. Boyd
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Patent number: 3982263Abstract: A large value resistor is formed during the standard processing steps in the fabrication of a monolithic integrated circuit device, the resistor being formed by a vertical channel FET, the channel of the FET being formed during diffusion of the isolation regions for the device, this diffusion extending down through the epitaxial layer of the device and through a channel defining opening in a buried layer region between the epitaxial layer and the substrate of the device.Type: GrantFiled: March 12, 1975Date of Patent: September 21, 1976Assignee: National Semiconductor CorporationInventor: Robert C. Dobkin
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Patent number: 3980541Abstract: Composite electrode structures are disclosed employing mutually opposed electrodes spaced apart to define a fluid treatment region through which a fluid is passed for treatment by an electric field established between the electrodes. Resistive electrodes serve to localize the effect of electrical shorts between the electrodes. Refractory electrodes and insulators permit operation in high temperature environments. Non-uniform sheet and/or filamentary electrodes are disclosed for producing a substantial non-uniformity in the electric field within the treatment region for producing forces on particles having no net charge. A floating electrode between driven electrodes allows formation of an induced electric field in the treatment region while reducing the possibility of electrical shorts. Paper electrodes and paper insulators permit fabrication of an inexpensive electrode structure.Type: GrantFiled: May 6, 1971Date of Patent: September 14, 1976Inventor: Harry E. Aine
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Patent number: 3980898Abstract: A novel sense amplifier circuit providing conversion of MOS input signals to TTL output signals with tri-state logic output at the output data bus, the input circuit of the sense amplifier providing current sensing and programmable input thresholds for economical construction and enhanced speed of operation of the sense amplifier. A novel tri-state operation is provided for the input section of the sense amplifier to provide either a clamped voltage at the input data bus line during MOS to TTL communication or a floating input when it is desired that MOS devices on the input data bus are to communicate.Type: GrantFiled: March 12, 1975Date of Patent: September 14, 1976Assignee: National Semiconductor CorporationInventor: Ury Priel
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Patent number: 3978537Abstract: In a swim fin, members are provided for maintaining a swimmer's foot in fixed angular relationship with respect to the swimmer's leg, particularly during a downward kick or leg extension mode. The ankle is substantially locked in one position, and stress that would be placed on the ankle in the utilization of a prior swim fin is transmitted to the leg. In one embodiment, a rigid member extends from the foot-receiving portion of the fin to engage the swimmer's lower shin. Straps maintain the swimmer's leg and foot in fixed relationship to the swim fin. Adjustable members may be provided for adjusting the selected, fixed angular relationship between the swimmer's foot and leg.Type: GrantFiled: January 14, 1975Date of Patent: September 7, 1976Assignee: Farallon Industries, Inc.Inventor: Ralph B. Shamlian
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Patent number: 3978322Abstract: A system for measuring the accuracy of an internal timing source of a device having a light emitting display which is energized at a rate derived from the timing cycle of that timing source includes an optical pickup disposed for receiving light emission from one element of the display and generating a signal having the same frequency as the frequency of such light emission. In one embodiment, the pulses of that signal which occur within a given time period are counted and the number of such counted pulses is supplied to a display for human recognition. In a second embodiment, the time elapsed during one or more complete light emitting cycles is measured and displayed for human recognition. The pulses of a timing signal having a period of one microsecond which occur during one or more complete light emitting cycles are counted and the resultant count is displayed.Type: GrantFiled: September 30, 1974Date of Patent: August 31, 1976Assignee: National Semiconductor CorporationInventor: Robert C. Dobkin
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Patent number: 3978343Abstract: In a common package, a light emitter, which is responsive to an input signal, produces an output optical signal which is coupled through an optically transmissive electrical insulator to a principal photodetector disposed in stray capacitive coupled relation to the light emitter for detecting the optical signal to produce an output signal in response thereto. A dummy photodetector, which has similar electrical characteristics to that of the principal photodetector except that it is rendered nonresponsive to the output optical signal is similarly coupled in stray capacitive relation to the light emitter to derive a dummy output signal. The dummy signal together with the principal output signal are fed to the differential input terminals of a differential amplifier which takes the difference of the two signals, thereby cancelling common mode signal components capacitively coupled to said photodetector and producing an amplified output signal.Type: GrantFiled: June 30, 1975Date of Patent: August 31, 1976Assignee: National Semiconductor CorporationInventors: James L. Broderick, William R. Fowler
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Patent number: 3978328Abstract: A pocket calculator includes a main frame which consists of a keyboard, a display and display drivers mounted on a printed circuit board, a case, and a connector for receiving one of a plurality of arithmetic or processor modules. Each processor module includes an arithmetic chip mounted in a package which is, in turn, mounted on a printed circuit board having an edge connector. The case of the calculator has an aperture for receiving each one of the modules. The connector on the printed circuit board of the main frame is mounted in registry with the aperture and is disposed for receiving the module, such that any one of the number of processor modules may be employed with the same calculator main frame.Type: GrantFiled: April 7, 1975Date of Patent: August 31, 1976Assignee: National Semiconductor CorporationInventors: William F. Fabry, Dennis C. Hersley
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Patent number: 3975757Abstract: Molded electrical devices such as integrated circuit devices. Molding composition comprises epoxidized novolac prepolymer; novolac prepolymer as cross linking agent, catalyst (preferably an imidazole) which is free of ionic components likely to detract from insulating characteristics and a filler in the form of finely ground fused silica which has been surface treated to remove all or substantially all hydrophilic groups.Type: GrantFiled: December 4, 1975Date of Patent: August 17, 1976Assignee: National Semiconductor CorporationInventor: Christian R. Sporck
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Patent number: 3974456Abstract: An output stage for an amplifier operating under capacitive loading conditions includes an FET-bipolar composite connected between its input and its output and an emitter follower connected in parallel with the FET. A current source and current tracking circuit maintains the emitter follower conductive at all times, such that relatively high frequency input signals are supplied to the output through the emitter follower. When the output stage is sourcing current to the load, the signal path is through the emitter follower. When the output stage is sinking current from the load, the signal path is primarily through the FET when relatively low frequency input signals are connected thereto and the signal path is primarily through the emitter follower when relatively high frequency input signals are connected thereto.Type: GrantFiled: February 12, 1975Date of Patent: August 10, 1976Assignee: National Semiconductor CorporationInventors: Ronald W. Russell, Kyle M. Black
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Patent number: 3972061Abstract: In a monolithic lateral silicon controlled rectifier structure suitable for integrated circuit application, laterally spaced P type conductivity regions are embedded in an epitaxial N type layer for defining lateral anode and cathode regions thereof. A subcollector layer of N+ conductivity is disposed underlying the anode, cathode and gate regions of the lateral semi-conductive structure. The anode region includes a P+ dependent zone extending down through the N type conductivity region to the N+ subcollector layer for reducing the "on" resistance of the silicon controlled rectifier structure. In addition, the N+ subcollector region is preferably a heavily doped region for further reduction of series resistance.Type: GrantFiled: August 6, 1975Date of Patent: July 27, 1976Assignee: National Semiconductor CorporationInventor: Carl T. Nelson